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PDF AOZ8905 Data sheet ( Hoja de datos )
| Número de pieza | AOZ8905 | |
| Descripción | Ultra-Low Capacitance TVS Diode Array | |
| Fabricantes | Alpha & Omega Semiconductors | |
| Logotipo |  |
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AOZ8905
Ultra-Low Capacitance TVS Diode Array
General Description
The AOZ8905 is a transient voltage suppressor array
designed to protect high speed data lines such as HDMI,
USB 2.0, MDDI, SATA, and Gigabit Ethernet from
damaging ESD events.
This device incorporates eight surge rated, low
capacitance steering diodes and a TVS in a single
package. During transient conditions, the steering diodes
direct the transient to either the positive side of the power
supply line or to ground.
The AOZ8905 provides a typical line to line capacitance
of 0.35pF and low insertion loss up to 3GHz providing
greater signal integrity making it ideally suited for HDMI
1.3 or USB 2.0 applications, such as Digital TVs,
DVD players, Computing, set-top boxes and MDDI
applications in mobile computing devices.
The AOZ8905 comes in RoHS compliant and halogen
free SOT23-6L package and is rated -40°C to +85°C
junction temperature range.
Features
z ESD protection for high-speed data lines:
– IEC 61000-4-2, level 4 (ESD) immunity test
– ±15kV (air discharge) and ±8kV (contact discharge)
– IEC61000-4-4 (EFT) 40A (5/50nS)
– IEC61000-4-5 (Lightning) 2.5A (8/20µS)
– Human Body Model (HBM) ±15kV
z Array of surge rated diodes with internal TVS diode
z Small package saves board space
z Protects four I/O lines
z Low capacitance between I/O lines: 0.35pF
z Low clamping voltage
z Low operating voltage: 5.0V
Applications
z HDMI, USB 2.0, MDDI, SATA ports
z Monitors and flat panel displays
z Set-top box
z Video graphics cards
z Digital Video Interface (DVI)
z Notebook computers
Typical Application
AOZ8905
AOZ8905
TX2+
TX2-
TX1+
TX1-
HDMI
Transmitter
TX0+
TX0-
CLK+
CLK-
Connector Connector
RX2+
RX2-
RX1+
RX1-
HDMI
Receiver
RX0+
RX0-
CLK+
CLK-
Rev. 1.1 April 2010
AOZ8905
Figure 1. HDMI Ports
www.aosmd.com
AOZ8905
Page 1 of 10
Free Datasheet http://www.datasheet4u.com/
1 page  
AOZ8905
TDR for HDMI 1.3
The AOZ8905 TDR test results indicates the minimal
effect the low capacitance has on the HDMI 1.3 TDR
measurements. Below are the graphs from the TDR
measurements. The two graphs show the before and
after results of the TDR of each of the differential data
line (Clock, D0, D1, D2) of the HDMI when the AOZ8905
was populated onto the PCB.
125 125
120 120
115 115
110 110
105 105
100 100
95 95
90 90
85 85
80 80
75
-0.200 ns
(Step 2.56 ps)
0.100ns/
0.7500 ns
75
-0.200 ns
(Step 2.56 ps)
0.100ns/
0.7500 ns
Figure 2. Ideal Stripe-Line
Figure 3. With AOZ8905 Device on the Board
(TDR Measurement with 200pS Rise Time Using AOS Evaluation Board)
High Speed PCB Layout Guidelines
Printed circuit board layout is the key to achieving the
highest level of surge immunity on power and data lines.
The location of the protection devices on the PCB is the
simplest and most important design rule to follow. The
AOZ8905 devices should be located as close as possible
to the noise source. The placement of the AOZ8905
devices should be used on all data and power lines that
enter or exit the PCB at the I/O connector. In most
systems, surge pulses occur on data and power lines
that enter the PCB through the I/O connector. Placing the
AOZ8905 devices as close as possible to the noise
source ensures that a surge voltage will be clamped
before the pulse can be coupled into adjacent PCB
traces. In addition, the PCB should use the shortest
possible traces. A short trace length equates to low
impedance, which ensures that the surge energy will be
dissipated by the AOZ8905 device. Long signal traces
will act as antennas to receive energy from fields that are
produced by the ESD pulse. By keeping line lengths as
short as possible, the efficiency of the line to act as an
antenna for ESD related fields is reduced. Minimize
interconnecting line lengths by placing devices with the
most interconnect as close together as possible. The
protection circuits should shunt the surge voltage to
either the reference or chassis ground. Shunting the
surge voltage directly to the IC’s signal ground can cause
ground bounce. The clamping performance of TVS
diodes on a single ground PCB can be improved by
minimizing the impedance with relatively short and wide
ground traces. The PCB layout and IC package parasitic
inductances can cause significant overshoot to the TVS’s
clamping voltage. The inductance of the PCB can be
reduced by using short trace lengths and multiple layers
with separate ground and power planes. One effective
method to minimize loop problems is to incorporate a
ground plane in the PCB design.
The AOZ8905 ultra-low capacitance TVS is designed to
protect four high speed data transmission lines from
transient over-voltages by clamping them to a fixed
reference. The low inductance and construction
minimizes voltage overshoot during high current surges.
When the voltage on the protected line exceeds the
reference voltage the internal steering diodes are forward
biased, conducting the transient current away from the
sensitive circuitry. The AOZ8905 is designed for the ease
of PCB layout by allowing the traces to run underneath
the device. The pinout of the AOZ8905 is designed to
simply drop onto the IO lines of a High Definition
Multimedia Interface (HDMI) or USB 3.0 design with
minimal diversion of the signal lines that may add more
parasitic inductance.
Rev. 1.1 April 2010
www.aosmd.com
Page 5 of 10
Free Datasheet http://www.datasheet4u.com/
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