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PDF LTC6900 Data sheet ( Hoja de datos )
| Número de pieza | LTC6900 | |
| Descripción | 1kHz to 20MHz Resistor Set SOT-23 Oscillator | |
| Fabricantes | Linear Technology | |
| Logotipo |  |
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FEATURES
s One External Resistor Sets the Frequency
s 1kHz to 20MHz Frequency Range
s 500µA Typical Supply Current, VS = 3V, 3MHz
s Frequency Error ≤1.5% Max, 5kHz to 10MHz
(TA = 25°C)
www.DataShseetF4rUe.cqoumency Error ≤ 2% Max, 5kHz to 10MHz
(TA = 0°C to 70°C)
s ±40ppm/°C Temperature Stability
s 0.04%/V Supply Stability
s 50% ±1% Duty Cycle 1kHz to 2MHz
s 50% ±5% Duty Cycle 2MHz to 10MHz
s Fast Start-Up Time: 50µs to 1.5ms
s 100Ω CMOS Output Driver
s Operates from a Single 2.7V to 5.5V Supply
s Low Profile (1mm) ThinSOTTM Package
U
APPLICATIO S
s Portable and Battery-Powered Equipment
s PDAs
s Cell Phones
s Low Cost Precision Oscillator
s Charge Pump Driver
s Switching Power Supply Clock Reference
s Clocking Switched Capacitor Filters
s Fixed Crystal Oscillator Replacement
s Ceramic Oscillator Replacement
LTC6900
Low Power, 1kHz to 20MHz
Resistor Set SOT-23 Oscillator
DESCRIPTIO
The LTC®6900 is a precision, low power oscillator that is
easy to use and occupies very little PC board space. The
oscillator frequency is programmed by a single external
resistor (RSET). The LTC6900 has been designed for high
accuracy operation (≤1.5% frequency error) without the
need for external trim components.
The LTC6900 operates with a single 2.7V to 5.5V power
supply and provides a rail-to-rail, 50% duty cycle square
wave output. The CMOS output driver ensures fast rise/fall
times and rail-to-rail switching. The frequency-setting
resistor can vary from 10kΩ to 2MΩ to select a master
oscillator frequency between 100kHz and 20MHz (5V
supply). The three-state DIV input determines whether the
master clock is divided by 1, 10 or 100 before driving the
output, providing three frequency ranges spanning 1kHz
to 20MHz (5V supply). The LTC6900 features a proprietary
feedback loop that linearizes the relationship between
RSET and frequency, eliminating the need for tables to
calculate frequency. The oscillator can be easily pro-
grammed using the simple formula outlined below:
100, DIV Pin = V +
fOSC
=
10MHz
•
20k
N • RSET
,
N
=
10,
1,
DIV Pin = Open
DIV Pin = GND
, LTC and LT are registered trademarks of Linear Technology Corporation.
ThinSOT is a trademark of Linear Technology Corporation.
TYPICAL APPLICATIO
Clock Generator
5V
10k ≤ RSET ≤ 2M
0.1µF
1 V+
1kHz ≤ fOSC ≤ 20MHz
5
OUT
2 LTC6900
GND
5V, N = 100
34
SET DIV
( )fOSC = 10MHz •
20k
N • RSET
N=1
OPEN, N = 10
6900 TA01
RSET vs Desired Output Frequency
10000
1000
÷100 ÷10 ÷1
100
10
1
1k 10k 100k 1M 10M 100M
DESIRED OUTPUT FREQUENCY (Hz)
6900 F02
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1 page  
LTC6900
PI FU CTIO S
V+ (Pin 1): Voltage Supply (2.7V ≤ V+ ≤ 5.5V). This supply
must be kept free from noise and ripple. It should be
bypassed directly to a ground plane with a 0.1µF capacitor.
GND (Pin 2): Ground. Should be tied to a ground plane for
best performance.
SET (Pin 3): Frequency-Setting Resistor Input. The value
of the resistor connected between this pin and V+ deter-
www.DataShmeeitn4eUs.ctohme oscillator frequency. The voltage on this pin is
held by the LTC6900 to approximately 1.1V below the V+
voltage. For best performance, use a precision metal film
resistor with a value between 10kΩ and 2MΩ and limit the
capacitance on this pin to less than 10pF.
DIV (Pin 4): Divider-Setting Input. This three-state input
selects among three divider settings, determining the
value of N in the frequency equation. Pin 4 should be tied
to GND for the ÷1 setting, the highest frequency range.
Floating Pin 4 divides the master oscillator by 10. Pin 4
should be tied to V+ for the ÷100 setting, the lowest
frequency range. To detect a floating DIV pin, the LTC6900
attempts to pull the pin toward midsupply. Therefore,
driving the DIV pin high requires sourcing approximately
2µA. Likewise, driving DIV low requires sinking 2µA.
When Pin 4 is floated, it should preferably be bypassed by
a 1nF capacitor to ground or it should be surrounded by a
ground shield to prevent excessive coupling from other
PCB traces.
OUT (Pin 5): Oscillator Output. This pin can drive 5kΩ
and/or 10pF loads. Heavier loads may cause inaccuracies
due to supply bounce at high frequencies. Voltage tran-
sients, coupled into Pin 5, above or below the LTC6900
power supplies will not cause latchup if the current into/
out of the OUT pin is limited to 50mA.
BLOCK DIAGRA
RSET
V+
1
IRES SET
3
VBIAS
2 GND
VRES = (V+ – VSET) = 1.1V TYPICALLY
+
GAIN = 1
–
MASTER OSCILLATOR
ƒMO
=
10MHz
•
20kΩ
•
(V
IRES
+ – VSET)
IRES
PATENT PENDING
PROGRAMMABLE
DIVIDER (N)
(÷1, 10 OR 100)
DIVIDER
SELECT
THREE-STATE
INPUT DETECT
OUT
5
V+
+– 2µA
DIV
4
+– 2µA
GND
6900 BD
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5 Page 
LTC6900
APPLICATIO S I FOR ATIO
Example 3:
V+ = 3V, fOSC(MAX) = 5MHz, fOSC(MIN) = 4MHz, N = 1
VIN(MAX) = 2.5V, VIN(MIN) = 0.5V
RIN/RSET = 8.5, RSET = 43.2k, RIN = 365k
Maximum modulation bandwidth is the lesser of 25kHz or
fOSC(MIN)/20 (4MHz/20 = 200kHz)
www.DataShMeeat4xUim.coumm VIN modulation frequency = 25kHz
Example 4:
V+ = 3V, fOSC(MAX) = 400kHz, fOSC(MIN) = 200kHz, N = 10
VIN(MAX) = 2.5V, VIN(MIN) = 0.5V
RIN/RSET = 3.1, RSET = 59k, RIN = 182k
Maximum modulation bandwidth is the lesser of 25kHz or
fOSC(MIN)/20 calculated at N =1 (2MHz/20 = 100kHz)
Maximum VIN modulation frequency = 25kHz
Table 2. Variation of VRES for Various Values of RIN || RSET
RIN || RSET (VIN = V+)
VRES, V + = 3V
VRES, V + = 5V
20k
0.98V
1.03V
40k
1.03V
1.08V
80k
1.07V
1.12V
160k 1.1V 1.15V
320k
1.12V
1.17V
VRES = Voltage across RSET
Note: All of the calculations above assume VRES = 1.1V, although VRES ≈ 1.1V. For completeness,
Table 2 shows the variation of VRES against various parallel combinations of RIN and RSET
(VIN = V+). Calulate first with VRES ≈ 1.1V, then use Table 2 to get a better approximation of VRES,
then recalculate the resistor values using the new value for VRES.
PACKAGE DESCRIPTIO
S5 Package
5-Lead Plastic TSOT-23
(Reference LTC DWG # 05-08-1635)
0.62 0.95
MAX REF
1.22 REF
2.90 BSC
(NOTE 4)
3.85 MAX 2.62 REF
1.4 MIN
2.80 BSC
1.50 – 1.75
(NOTE 4)
RECOMMENDED SOLDER PAD LAYOUT
PER IPC CALCULATOR
0.20 BSC
DATUM ‘A’
PIN ONE
0.95 BSC
0.80 – 0.90
1.00 MAX
0.30 – 0.45 TYP
5 PLCS (NOTE 3)
0.01 – 0.10
0.30 – 0.50 REF
0.09 – 0.20
NOTE:
(NOTE 3)
1. DIMENSIONS ARE IN MILLIMETERS
2. DRAWING NOT TO SCALE
3. DIMENSIONS ARE INCLUSIVE OF PLATING
4. DIMENSIONS ARE EXCLUSIVE OF MOLD FLASH AND METAL BURR
5. MOLD FLASH SHALL NOT EXCEED 0.254mm
6. JEDEC PACKAGE REFERENCE IS MO-193
1.90 BSC
S5 TSOT-23 0302
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
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11 Page | ||
| Páginas | Total 12 Páginas | |
| PDF Descargar | [ Datasheet LTC6900.PDF ] | |
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