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PDF SR2.8 Data sheet ( Hoja de datos )
| Número de pieza | SR2.8 | |
| Descripción | RailClamp Low Capacitance TVS Diode Array | |
| Fabricantes | Semtechoration | |
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PROTECTION PRODUCTS
Description
RailClamps are surge rated diode arrays designed to
protect high speed data interfaces. The SR series has
been specifically designed to protect sensitive compo-
nents which are connected to data and transmission
lines from overvoltage caused by ESD (electrostatic
discharge), EFT (electrical fast transients), and tertiary
lightning.
The unique design of the SR series devices incorpo-
rates four surge rated, low capacitance steering diodes
and a TVS diode in a single package. The TVS diode is
constructed using Semtech’s proprietary low voltage
EPD technology for superior electrical characteristics at
2.8 volts.
During transient conditions, the steering diodes direct
the transient to either the positive side of the power
supply line or to ground. The internal TVS diode pre-
vents over-voltage on the power line, protecting any
downstream components.
The low capacitance array configuration allows the user
to protect two high-speed data or transmission lines.
The low inductance construction minimizes voltage
overshoot during high current surges.
SR2.8
RailClamp™
Low Capacitance TVS Diode Array
Features
! ESD protection to IEC 61000-4-2, Level 4
! Array of surge rated diodes with internal
EPD TVS diode
! Protects two I/O lines
! Low capacitance (<10pF) for high-speed interfaces
! Low leakage current (< 1µA)
! Low operating voltage: 2.8V
! Solid-state technology
Mechanical Characteristics
! JEDEC SOT-143 package
! Molding compound flammability rating: UL 94V-0
! Marking : R2.8
! Packaging : Tape and Reel per EIA 481
Applications
! 10/100 Ethernet
! Firewire
! Sensitive Analog Inputs
! Video Line Protection
! Portable Electronics
! Microcontroller Input Protection
! WAN/LAN Equipment
Circuit Diagram
Pin 4
Pin 2
Pin 3
Revision 9/2000
Pin 1
Schematic & PIN Configuration
4
1
23
SOT-143 (Top View)
1 www.semtech.com
1 page  
SR2.8
PROTECTION PRODUCTS
Applications Information (continued)
the TVS clamping voltage and the voltage due to the
parasitic inductance (VC(TOT) = VC + L di/dt) . Parasitic
inductance in the protection path can result in signifi-
cant voltage overshoot, reducing the effectiveness of
the suppression circuit. An ESD induced transient for
PexIaNmDplee srecarciphteisoanspeak in approximately 1ns. For a
30A pulse (per IEC 61000-4-2 Level 4), 1nH of series
inductance will increase the effective clamping voltage
by 30V
(V = 1x10-9 (30/1x10-9)). For maximum effectiveness,
the following board layout guidelines are recom-
mended:
VBRR
IPP
I SB
I PT
IR
I BRR
VRWM VSB VPT VC
" Minimize the path length between the SR2.8 and
the protected line.
" Place the SR2.8 near the RJ45 connector to
restrict transient coupling in nearby traces.
" Minimize the path length (inductance) between the
RJ45 connector and the SR2.8.
EPD TVS Characteristics
The internal TVS of the SR2.8 is constructed using
Semtech’s proprietary EPD technology. The structure
of the EPD TVS is vastly different from the traditional
pn-junction devices. At voltages below 5V, high leak-
age current and junction capacitance render conven-
tional avalanche technology impractical for most
applications. However, by utilizing the EPD technology,
the SR2.8 can effectively operate at 2.8V while main-
taining excellent electrical characteristics.
The EPD TVS employs a complex nppn structure in
contrast to the pn structure normally found in tradi-
tional silicon-avalanche TVS diodes. The EPD mecha-
nism is achieved by engineering the center region of
the device such that the reverse biased junction does
not avalanche, but will “punch-through” to a conduct-
ing state. This structure results in a device with supe-
rior dc electrical parameters at low voltages while
maintaining the capability to absorb high transient
currents.
Figure 1 - EPD TVS IV Characteristic Curve
The IV characteristic curve of the EPD device is shown
in Figure 1. The device represents a high impedance
to the circuit up to the working voltage (VRWM). During a
transient event, the device will begin to conduct as it is
biased in the reverse direction. When the punch-
through voltage (VPT) is exceeded, the device enters a
low impedance state, diverting the transient current
away from the protected circuit. When the device is
conducting current, it will exhibit a slight “snap-back” or
negative resistance characteristic due to its structure.
This must be considered when connecting the device
to a power supply rail. To return to a non-conducting
state, the current through the device must fall below
the snap-back current (approximately < 50mA).
2000 Semtech Corp.
5
www.semtech.com
5 Page | ||
| Páginas | Total 8 Páginas | |
| PDF Descargar | [ Datasheet SR2.8.PDF ] | |
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