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PDF MAX2101 Data sheet ( Hoja de datos )

Número de pieza MAX2101
Descripción 6-Bit Quadrature Digitizer
Fabricantes Maxim Integrated 
Logotipo Maxim Integrated Logotipo



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No Preview Available ! MAX2101 Hoja de datos, Descripción, Manual

19-0298; Rev 4; 5/96
EVAALVUAAILTAIOBNLEKIT
6-Bit Quadrature Digitizer
_______________General Description
The MAX2101 6-bit quadrature digitizer combines quad-
rature demodulation with analog-to-digital conversion on
a single bipolar silicon die. This unique RF-to-BitsTM
function bridges the gap between existing RF downcon-
verters and CMOS digital signal processors (DSPs).
The MAX2101’s simple receiver subsystem is designed
for digital communications systems such as those used
in DBS, TVRO, WLAN, and other applications.
The MAX2101 accepts input signals from 400MHz to
700MHz and applies adjustable gain, providing at least
40dB of dynamic range.
Each baseband is filtered by an on-chip, 5th-order
Butterworth lowpass filter, or the user can select an
external filter path. Baseband sample rate is 60Msps.
The MAX2101 is available in a commercial temperature
range, 100-pin MQFP package.
____________________________Features
o ADCs Provide Greater than 5.5 Effective Bits at
fS = 60Msps, fIN = 15MHz
o Fully Integrated Lowpass Filters with
Externally Variable Bandwidth (10MHz to 30MHz)
o 40dB Dynamic Range
o Integrated VCO and Quadrature Generation
Network for I/Q Demodulation
o Divide-by-16 Prescaler for Oscillator PLL
o Programmable Counter for Variable Sample Rates
o Signal-Detection Function
o Selectable Offset Binary or Twos-Complement
Output Data Format
o Automatic Baseband Offset Cancellation
________________________Applications
Recovery of PSK and QAM Modulated RF Carriers
Direct-Broadcast Satellite (DBS) Systems
Television Receive-Only (TVRO) Systems
Cable Television (CATV) Systems
Wireless Local Area Networks (WLANs)
______________Ordering Information
PART
MAX2101CMQ
TEMP. RANGE
0°C to +70°C
PIN-PACKAGE
100 MQFP
__________________________________________________Typical Application Circuit
LOW-NOISE AMPLIFIER
X/KU BAND
H POLARIZATION
V POLARIZATION
LOCAL OSCILLATOR
LOW-NOISE BLOCK
950MHz to 2000MHz
LOCAL OSCILLATOR
L-BAND DOWNCONVERTER
600MHz
(NARROW BAND)
QUADRATURE
GENERATION
90°
A/D
CONVERSION
DIV-16
612MHz PHASE LOCKED
MAX2101
TMRF-to-Bits is a registered trademark of Tektronix, Inc.
MATCHED
FILTERS
CLOCK
AND
CARRIER
RECOVERY
ERROR
DETECTION
AND
CORRECTION
MISCELLANEOUS
DSP
DSP POST PROCESSING
________________________________________________________________ Maxim Integrated Products 1
For free samples & the latest literature: http://www.maxim-ic.com, or phone 1-800-998-8800

1 page




MAX2101 pdf
6-Bit Quadrature Digitizer
TIMING CHARACTERISTICS
(VGND = system ground, VCCA = VCCD = 5.0V ±5%, TA = +25°C, unless otherwise noted.) (Note 4)
PARAMETER
Data Clock Period (Figure 2)
Propagation Delay, Clock to Data (Figure 2)
Data Output Skew (all 12 outputs) Settled within 20% (Figure 2)
Aperture Delay Relative to Data Clock (Figure 2)
Aperture Delay Match, Channel to Channel
Data Output Rise, Fall Time (20% to 80%) (Note 7)
Data Clock Output Rise, Fall Time (20% to 80%) (Note 7)
Reference (Div 6) Clock Output Rise, Fall Time (20% to 80%) (Note 7)
Reference Clock Output Jitter, RMS
VCO Prescaler Output Rise, Fall Time (20% to 80%) (Note 7)
SYMBOL
tPC
tPCQ
tSKEW
tAPERTURE
tAP-MATCH
tr, tf
tr, tf
tr, tf
tj
tr, tf
MIN
Note 7: RL = 1M, CL = 15pF
TYP
16
4
1
1
20
4
3
5
30
3
MAX
UNITS
ns
ns
ns
ns
ps
ns
ns
ns
ps
ns
__________________________________________Typical Operating Characteristics
(VCC = 5V, TA = +25°C, unless otherwise noted.)
SUPPLY CURRENT vs.
SUPPLY VOLTAGE
260
255
250
245
240
235
230
4.75 4.85 4.95 5.05 5.15 5.25
VCC (V)
300
290
280
270
260
250
240
230
220
210
200
0
SUPPLY CURRENT vs.
TEMPERATURE
10 20 30 40 50 60
TEMPERATURE (°C)
70
1.220
VREF (PIN 88) VOLTAGE vs.
TEMPERATURE
1.218
1.216
1.214
1.212
1.210
1.208
1.206
0
10 20 30 40 50 60 70
TEMPERATURE (°C)
_______________________________________________________________________________________ 5

5 Page





MAX2101 arduino
6-Bit Quadrature Digitizer
ANALOG
INPUT
N
tAPERTURE
DATA
CLOCK
N+1
tPC
DATA
OUT
NOTE: DATA IS VALID ON
THE RISING EDGE OF DCLK.
tPCQ
tSKEW
DATA VALID N-1
Figure 2. Baseband Signal, Sample/Data Clock, and Digitized Data Timing
N+2
DATA VALID N
IFIN
(PIN 90)
AGC
(PIN 93)
AGC
IFINB 40dB to 0dB
(PIN 91)
400MHz to 700MHz
MIXOUTI BBINI
(PIN 81) (PIN 78)
6dB
FTUNEI
(PIN 77)
LPF
0dB 10MHz to 30MHz
EN
FLTRSEL
(PIN 95)
0: INTERNAL
1: EXTERNAL
0dB
90°
6dB
TNKA
(PIN 17)
TNKB
(PIN 14)
400MHz to 700MHz
DIV-16
EN
LPF
10MHz to 30MHz
FTUNEQ
(PIN 4)
MIXOUTQ BBINQ
(PIN 100) (PIN 3)
VCOPRE
(PIN 23)
VCOPREB
(PIN 24)
Figure 3. Functional Diagram—MAX2101 RF Front-End Section
OFFI CIB
CI
(PIN 76) (PIN 72) (PIN 71)
EN
1
2:1
0 MUX
01
ENOPB
(PIN 68)
GND: ENABLE
VCC: DISABLE
01
2:1
0 MUX
1
EN
150k
150k
2
2
150k
150k
BBOUTI
(PIN 75)
BBOUTIB
(PIN 74)
1.5Vp-p
(DIFFERENTIAL)
BASEBAND
CHANNEL I
PWRI
(PIN 85)
PWRQ
(PIN 96)
1.5Vp-p
(DIFFERENTIAL)
BASEBAND
CHANNEL Q
BBOUTQ
(PIN 6)
BBOUTQB
(PIN 7)
OFFQ
CQB
CQ
(PIN 5) (PIN 69) (PIN 70)
______________________________________________________________________________________ 11

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