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PDF SM59R16A2 Data sheet ( Hoja de datos )
| Número de pieza | SM59R16A2 | |
| Descripción | 8-Bit Micro-controller | |
| Fabricantes | SyncMOS | |
| Logotipo |  |
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Product List
SM59R16A2L25, SM59R16A2C25
SM59R08A2L25, SM59R08A2C25
Description
The SM59R16A2/SM59R08A2 is a 1T (one machine
cycle per clock) single-chip 8-bit microcontroller. It
has 64K/32K-byte embedded Flash for program, and
executes all ASM51 instructions fully compatible with
MCS-51.
SM59R16A2/SM59R08A2 contains 2KB on-chip RAM,
48 GPIOs, various serial interfaces and many
peripheral functions as described below. It can be
programmed via writers. Its on-chip ICE is convenient
for users in verification during development stage.
The high performance of SM59R16A2/ SM59R08A2
can achieve complicated manipulation within short
time. About one third of the instructions are pure 1T,
and the average speed is 8 times of traditional 8051,
the fastest one among all the 1T 51-series. Its
excellent EMI and ESD characteristics are
advantageous for many different applications.
Ordering Information
SM59R16A2(SM59R08A2)ihhkL
yymmv
i: process identifier {L = 2.7V ~ 3.6V, C = 4.5V ~ 5.5V}
hh: working clock in MHz {25}
k: package type postfix {as table below }
L:PB Free identifier
{No text is Non-PB free，”P” is PB free}
yy: year
mm: month
v: version identifier{ A, B,…}
Postfix
W
U
Package
64L TQFP
64L LQFP
Pin / Pad Configuration
Page 2,3
Page 2,3
SM59R16A2/SM59R08A2
8-Bit Micro-controller
64KB/32KB ISP Flash & 2KB RAM embedded
Features
z Operating Voltage: 4.5V ~ 5.5V or 2.7V ~ 3.6V
z High speed architecture of 1 clock/machine cycle
(1T), runs up to 25MHz
z 1T/2T can be switched on the fly
z Instruction-set compatible with MCS-51
z Internal OSC with range 1MHz – 24MHz
z 64K/32K bytes on-chip program memory
z External RAM addresses up to 64K bytes.
Standard 12T interface for external RAM access.
z 256 bytes RAM as standard 8052, plus 2K bytes
on-chip expandable RAM
z Dual 16-bit Data Pointers (DPTR0 & DPTR1)
z Two serial peripheral interfaces in full duplex
mode (UART0 & UART1),
z Three 16-bit Timers/Counters. (Timer 0 , 1, 2)
z 48 GPIOs
z External interrupt 0,1 with two priority levels
z Programmable watchdog timer (WDT)
z One IIC interface (Master/Slave mode)
z One SPI interface (Master/Slave mode)
z 4-channel PWM (12-bit, 10-bit, 8-bit options)
z 4-channel 16-bit compare /capture /load functions
z 4-channel 10-bit analog-to-digital converter (ADC)
z ISP/ IAP functions.
z EEPROM function
z On-chip in-circuit emulator (ICE) function with
On-Chip Debugger（OCD）
z Fast multiplication-division unit (MDU) : 16*16,
32/16, 16/16, 32-bit L/R shifting and 32-bit
normalization
z Expanded External Interrupt (EEI) interface on
Port 1 for eight more interrupts
z Enhanced user code protection
z Power management unit for idle and power down
modes
Contact SyncMOS : www.syncmos.com.tw
6F, No.10-2 Li- Hsin 1st Road , SBIP, Hsinchu, Taiwan
TEL: 886-3-567-1820 FAX: 886-3-567-1891
Specifications subject to change without notice contact your sales representatives for the most recent information.
ISSFD-M034
1 Ver.B SM59R16A2/SM59R08A2 06/2009
1 page  
SM59R16A2/SM59R08A2
8-Bit Micro-controller
64KB/32KB ISP Flash & 2KB RAM embedded
Pin Description
Pin Name I/O
Description
1
P5.2
i/o Bit 2 of port 5
2
P5.3
i/o Bit 3 of port 5
3
P5.4
i/o Bit 4 of port 5
4
P5.5
i/o Bit 5 of port 5
5
P5.6
i/o Bit 6 of port 5
6
P5.7
i/o Bit 7 of port 5
7 VDDIO
Power supply
8 VSSIO
Digital ground
9
P4.0/PWM2
i/o Bit 0 of port 4 & PWM Channel 2
10 P4.1/PWM3 i/o Bit 1 of port 4 & PWM Channel 3
11 P4.2 i/o Bit 2 of port 4
12 P4.3 i/o Bit 3 of port 4
13 P4.4/ADC0 i/o Bit 4 of port 4 & ADC channel 0
14 P4.5/ADC1 i/o Bit 5 of port 4 & ADC channel 1
15 P4.6/ADC2 i/o Bit 6 of port 4 & ADC channel 2
16 P4.7/ADC3 i/o Bit 7 of port 4 & ADC channel 3
17 XTAL1
i Crystal input
18 XTAL2
o Crystal output
19 NC
i No Connect
20 P1.7/IIC_SDA i/o Bit 7 of port 1 & IIC SDA pin
21 P1.6/IIC_SCL i/o Bit 6 of port 1 & IIC SCL pin
22
P1.5/PWM1/CC1
i/o
Bit 5 of port 1 & PWM Channel 1
& Timer 2 compare/capture Channel 1
23
P1.4/PWM0/CC0
i/o
Bit 4 of port 1 & PWM Channel 0
& Timer 2 compare/capture Channel 0
24 AVDD
Analog Power supply
25 AVDD3V
Analog Power supply
26 AVSS
Analog ground
Bit 3 of port 1 & Serial interface channel 1
27 P1.3/TXD1/CC3/SPI_MOSI i/o & Timer 2 compare/capture Channel 3
& SPI interface Serial Data Input pin
Bit 2 of port 1 & Serial interface channel 1
28 P1.2/RXD1/CC2/SPI_MISO i/o & Timer 2 compare/capture Channel 2
& SPI interface Serial Data Out pin
29
P1.1/T2EX/SPI_CLK
i/o
Bit 1 of port 1 & Timer 2 capture trigger
& SPI interface Clock pin
30
P1.0/T2/SPI_SS
i/o
Bit 0 of port 1 & Timer 2 external input clock
& SPI interface Slave Select pin
31 P2.7/A15 i/o Bit 7 of port 2 & Bit 15 of external memory address
32 P2.6/A14 i/o Bit 6 of port 2 & Bit 14 of external memory address
33 P2.5/A13 i/o Bit 5 of port 2 & Bit 13 of external memory address
34 P2.4/A12 i/o Bit 4 of port 2 & Bit 12 of external memory address
35 P2.3/A11 i/o Bit 3 of port 2 & Bit 11 of external memory address
36 P2.2/A10 i/o Bit 2 of port 2 & Bit 10 of external memory address
37 P2.1/A9 i/o Bit 1 of port 2 & Bit 9 of external memory address
38 P2.0/A8 i/o Bit 0 of port 2 & Bit 8 of external memory address
39 P3.7/RD i/o Bit 7 of port 3 & external memory read signal
40 P3.6/WR i/o Bit 6 of port 3 & external memory write signal
Specifications subject to change without notice contact your sales representatives for the most recent information.
ISSFD-M034
5 Ver.B SM59R16A2/SM59R08A2 06/2009
5 Page 
SM59R16A2/SM59R08A2
8-Bit Micro-controller
64KB/32KB ISP Flash & 2KB RAM embedded
Fig. 1-2(a): The waveform of internal instruction signal in 2T mode
Fig. 1-2(b): The waveform of internal instruction signal in 1T mode
The default is in 2T mode, and it can be changed to 1T mode if IFCON [7] (at address 8Fh) is set to
high any time. Not every instruction can be executed with one machine cycle. The exact machine
cycle number for all the instructions are given in the next section.
1.4 Reset
Brownout detection is also one type of internal reset to prevent SM59R16A2/SM59R08A2 from going
to unstable condition as described in Section 1.3.
1.5 Clocks
The default clock is the 1MHz clock signal coming from the internal OSC. This clock is used during
the initialization stage. The major work of the initialization stage is to determine the clock source
used in normal operation.
The clock source can be external and internal. The external clock source is from the crystal via
crystal pads XTAL1 and XTA2, or oscillator through XTAL1 only. Here we need to be aware that
XTAL1 are not 5V tolerant in 3.3V application, so a 3.3V oscillator source is recommended.
The internal clock sources are from the internal OSC with difference frequency division as given in
the next table:
Table 1-1: Selection of clock source
Clock source
external crystal or internal OSC
24MHz from internal OSC
20MHz from internal OSC
16MHz from internal OSC
12MHz from internal OSC
8MHz from internal OSC
4MHz from internal OSC
2MHz from internal OSC
1MHz from internal OSC as default clock used in initialization
There may be 20% variance in the frequency from the internal OSC. It is not recommended to use
them in the application requiring accurate frequency.
Specifications subject to change without notice contact your sales representatives for the most recent information.
ISSFD-M034
11 Ver.B SM59R16A2/SM59R08A2 06/2009
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet SM59R16A2.PDF ] | |
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