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PDF RT8886A Data sheet ( Hoja de datos )

Número de pieza RT8886A
Descripción 2-Phase Controller
Fabricantes Richtek 
Logotipo Richtek Logotipo



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®
RT8886A
2-Phase Controller with Dual Integrated Drivers for VR12.5
and VR12.6 Mobile CPU Core Power Supply
General Description
The RT8886A is a two phase CPU power controller with
dual integrated drivers for VR12.5 and VR12.6 compliant.
The RT8886A adopts the G-NAVPTM (Green Native AVP)
which is Richtek's proprietary topology derived from finite
DC gain of EA amplifier with current mode control, making
it easy to set the droop to meet all Intel CPU requirements
of AVP (Adaptive Voltage Positioning). Based on the G-
NAVPTM topology, the RT8886A also features a quick
response mechanism for optimized AVP performance
during load transient. The RT8886A supports mode
transition function with various operating states. A Serial
VID (SVID) interface is built in the RT8886A to
communicate with Intel VR12.5 and VR12.6 compliant
CPU. The RT8886A supports VID on-the-fly function with
different slew rates. By utilizing the G-NAVPTM topology,
the operating frequency of the RT8886A varies with VID,
load current and input voltage to further enhance the
efficiency even in CCM. Besides the G-NAVPTM, the
CCRCOT (Constant Current Ripple Constant On Time)
technology provides superior output voltage ripple over
the entire input/output range. The built-in high accuracy
DAC converts the SVID code ranging from 0.5V to 3.04V
with 10mV per step. The RT8886A integrates a high
accuracy ADC for platform setting functions, such as no-
load offset and over-current protection level. The RT8886A
provides VR ready output signals. It also features complete
fault protection functions including Over-Voltage (OV),
Under-Voltage (UV), Negative-Voltage (NV), Over-Current
(OC) and Under-Voltage Lockout (UVLO). The RT8886A
is available in the WQFN-32L 4x4 small foot print package.
Features
Intel VR12.5 and VR12.6 Serial VID Interface
Compatible Power Management States
2/1 Phase PWM Controller with Dual Integrated
Drivers
G-NAVPTM Topology
0.5% DAC Accuracy
Differential Remote Voltage Sensing
Built-in ADC for Platform Programming
Accurate Current Balance
System Thermal Compensated AVP
Diode Emulation Mode at Light Load Condition for
Single Phase
Fast transient Response
VR Ready Indicator
Thermal Throttling
Current Monitor Output
OVP, UVP, OCP, UVLO
Programmable DVID Slew Rate
DVID Enhancement
Small 32-Lead WQFN Package
RoHS Compliant and Halogen Free
Simplified Application Circuit
To PCH
To CPU
RT8886A
VR_RDY
PHASE1
VR_HOT
VCLK
VDIO
PHASE2
ALERT
MOSFET
MOSFET
VCORE
Copyright ©2013 Richtek Technology Corporation. All rights reserved.
DS8886A-00 November 2013
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
1

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RT8886A pdf
Operation
The RT8886A adopts the G-NAVPTM (Green Native AVP)
which is Richtek's proprietary topology derived from finite
DC gain of EA amplifier with current mode control, making
it easy to set the droop to meet all Intel CPU requirements
of AVP (Adaptive Voltage Positioning).
The G-NAVPTM controller is one type of current mode
constant on-time control with DC offset cancellation. The
approach can not only improve DC offset problem for
increasing system accuracy but also have fast transient
response. When current feedback signal reaches COMP
signal, the RT8886A generates an on-time width to achieve
PWM modulation.
TON GEN
Generate the PWM signal sequentially according to the
phase control signal from the Loop Control Protection
Logic.
SVID Interface/Configuration Registers/Control
Logic
The interface that receives the SVID signal from CPU and
sends the relative signals to Loop Control Protection Logic
to execute the action by CPU.
The registers save the pin setting data from ADC output.
The Control Logic controls the ADC timing and generates
the digital code of the VID that is relative to VSEN.
RT8886A
Loop Control Protection Logic
It controls the power on sequence, and the protection
behavior, and the operational phase number.
Current Balance
Each phase current sense signal is sent to the current
balance circuit which adjusts the on-time of each phase
to optimize current sharing.
Offset Cancellation
Cancel the current/voltage ripple issue to get the accurate
VSEN.
UVLO
Detect the PVCC and VCC voltage and issue POR signal
as they are high enough.
DAC
Generate an analog signal according to the digital code
generated by Control Logic.
Soft-Start & Slew Rate Control
Control the Dynamic VID slew rate of VSET according to
the SetVID fast or SetVID slow.
Copyright ©2013 Richtek Technology Corporation. All rights reserved.
DS8886A-00 November 2013
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
5

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RT8886A arduino
VID7
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
VID6
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
VID5
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
VID4
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
VID3
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
Copyright ©2013 Richtek Technology Corporation. All rights reserved.
DS8886A-00 November 2013
RT8886A
VID2
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
VID1
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
VID0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
HEX
CD
CE
CF
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
DA
DB
DC
DD
DE
DF
E0
E1
E2
E3
E4
E5
E6
E7
E8
E9
EA
EB
EC
ED
EE
EF
F0
F1
F2
F3
F4
F5
Voltage (V)
2.540
2.550
2.560
2.570
2.580
2.590
2.600
2.610
2.620
2.630
2.640
2.650
2.660
2.670
2.680
2.690
2.700
2.710
2.720
2.730
2.740
2.750
2.760
2.770
2.780
2.790
2.800
2.810
2.820
2.830
2.840
2.850
2.860
2.870
2.880
2.890
2.900
2.910
2.920
2.930
2.940
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
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