Datasheet XRK32309 Equivalent ( PDF )

N.º	Número de pieza	Descripción	Fabricantes	Category
1	XRK32309	LOW-COST 3.3V ZERO DELAY BUFFER MAY 2006 PRELIMINARY XRK32309 REV. P1.0.1 LOW-COST 3.3V ZERO DELAY BUFFER GENERAL DESCRIPTION FUNCTIONAL DESCRIPTION Offered in both 16 pin SOIC and TSSOP packages, XRK32309 is a low cost 3.3V zero delay buffer. It is designed to distribute high speed clocks by taking one ref	Exar Corporation	buffer

XRK Datasheet ( Hoja de datos ) - resultados coincidentes

N.º	Número de pieza	Descripción	Fabricantes	Catagory
1	XRK32308	3.3V ZERO DELAY BUFFER MAY 2006 PRELIMINARY XRK32308 3.3V ZERO DELAY BUFFER REV. P1.0.2 GENERAL DESCRIPTION FUNCTIONAL DESCRIPTION XRK32308 is a 3.3V Zero Delay Buffer designed to distribute high-speed clocks in PC, workstation, datacom, telecom, and other high-performance applications. The part has	Exar Corporation	buffer
2	XRK32309	LOW-COST 3.3V ZERO DELAY BUFFER MAY 2006 PRELIMINARY XRK32309 REV. P1.0.1 LOW-COST 3.3V ZERO DELAY BUFFER GENERAL DESCRIPTION FUNCTIONAL DESCRIPTION Offered in both 16 pin SOIC and TSSOP packages, XRK32309 is a low cost 3.3V zero delay buffer. It is designed to distribute high speed clocks by taking one ref	Exar Corporation	buffer
3	XRK32510	3.3V PHASE-LOCK LOOP CLOCK DRIVER xr OCTOBER 2005 XRK32510 3.3V PHASE-LOCK LOOP CLOCK DRIVER WITH 10 CLOCK OUTPUTS REV. 1.0.1 GENERAL DESCRIPTION The XRK32510 is a high performance, low jitter, low skew clock driver. The XRK32510 uses phase-lock loop (PLL) tecnology to synthesize the CLK_IN signal into 10 outp	Exar Corporation	driver
4	XRK39351	9-OUTPUT PLL CLOCK DRIVER xr FEBRUARY 2006 PRELIMINARY XRK39351 REV. P1.0.0 3.3V OR 2.5V, 9-OUTPUT PLL CLOCK DRIVER input is pulled low. This is a test mode intended for system debug purposes. The XRK39351 has an output/input frequency range of 25MHz to 200MHz with the PLL enabled and an input frequen	Exar Corporation	driver
5	XRK39653	8-OUTPUT ZERO DELAY BUFFER xr FEBRUARY 2006 PRELIMINARY XRK39653 REV. P1.0.0 3.3V, 8-OUTPUT ZERO DELAY BUFFER use. The second is a full bypass mode that has the PLL and divider operation removed (BYPASS=0). In this mode the reference clock directly sources the outputs drivers. XRK39653 GENERAL DESCRIP	Exar Corporation	buffer
6	XRK39910	3.3V LOW SKEW PLL CLOCK DRIVER JULY 2006 XRK39910 3.3V LOW SKEW PLL CLOCK DRIVER REV. 1.0.0 FUNCTIONAL DESCRIPTION The XRK39910 is a high fanout phase locked-loop clock driver intended for high performance computing and data-communications applications. It has eight zero delay LVTTL outputs. When the OE pin	Exar Corporation	driver
7	XRK4991	SKEW CLOCK BUFFER xr OCTOBER 2005 XRK4991 3.3V HIGH-SPEED (85 MHZ) PROGRAMMABLE SKEW CLOCK BUFFER REV. 1.0.1 FUNCTIONAL DESCRIPTION The XRK4991 is a 3.3V High-Speed Low-Voltage Programmable Skew Clock Buffer. It is intended for high-performance computer systems and offers user selectable contro	Exar Corporation	buffer

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Número de pieza	Descripción	Fabricantes	PDF
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