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SN74LS76N даташит ( Datasheet PDF , Даташиты ) |
Номер в каталоге | Описание | Производители | ||
20 | SN74LS724 | Voltage Controlled Oscillator
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![]() Motorola Semiconductor |
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19 | SN74LS73A | Dual J-K Flip-Flops With Clear |
![]() Texas Instruments |
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18 | SN74LS73A | DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP
The SN54LS / 74LS73A offers individual J, K, clear, and clock inputs. These dual flip-flops are designed so that when the clock goes HIGH, the inputs are enabled and data will be accepted. The logic level of the J and K inputs may be allowed to change when the clock pulse is HIGH and the bistable will perform according to the truth table as long as minimum set-up times are observed. Input data is transferred to the outputs on the negative-going edge of the clock pulse.
SN54/74L |
![]() Motorola |
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17 | SN74LS748 | 10-LINE-TO-4-LINE AND 8-LINE-TO-3-LINE PRIORITY ENCODERS 10-LINE-TO-4-LINE AND 8-LINE-TO-3-LINE PRIORITY ENCODERS
The SN54 / 74LS147 and the SN54/ 74LS148 are Priority Encoders. They provide priority decoding of the inputs to ensure that only the highest order data line is encoded. Both devices have data inputs and outputs which are active at the low logic level.
The LS147 encodes nine data lines to four-line (8-4-2-1) BCD. The implied decimal zero condition does not require an input condition because zero is encoded when all nine data lines are at a high logic level.
The LS |
![]() Motorola |
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16 | SN74LS74A | Dual D-Type Positive-Edge -Triggered Flip-Flops With Preset And Clear |
![]() Texas Instruments |
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15 | SN74LS74A | LOW POWER SCHOTTKY SN74LS74A Dual D-Type Positive Edge-Triggered Flip-Flop
The SN74LS74A dual edge-triggered flip-flop utilizes Schottky TTL circuitry to produce high speed D-type flip-flops. Each flip-flop has individual clear and set inputs, and also complementary Q and Q outputs. Information at input D is transferred to the Q output on the positive-going edge of the clock pulse. Clock triggering occurs at a voltage level of the clock pulse and is not directly related to the transition time of the positive-going pulse. When the clock in |
![]() ON Semiconductor |
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14 | SN74LS74A | DUAL D-TYPE POSITIVE EDGE-TRIGGERED FLIP-FLOP DUAL D-TYPE POSITIVE EDGE-TRIGGERED FLIP-FLOP
The SN54 / 74LS74A dual edge-triggered flip-flop utilizes Schottky TTL circuitry to produce high speed D-type flip-flops. Each flip-flop has individual clear and set inputs, and also complementary Q and Q outputs.
Information at input D is transferred to the Q output on the positive-going edge of the clock pulse. Clock triggering occurs at a voltage level of the clock pulse and is not directly related to the transition time of the positive-going pulse. When the clock input i |
![]() Motorola |
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13 | SN74LS75 | 4-Bit Bistable Latches |
![]() Texas Instruments |
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Номер в каталоге | Описание | Производители | |
CD4515BC | The CD4514BC and CD4515BC are 4-to-16 line decoders with latched inputs implemented with complementary MOS (CMOS) circuits constructed with N- and P-channel enhancement mode transistors. |
![]() Fairchild Semiconductor |
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HV101WU1-1E6 | HV101WU1-1E6 is a color active matrix TFT LCD module using amorphous silicon TFT's (Thin Film Transistors) as an active switching devices. |
![]() HYDIS |
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