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SN74LS76N даташит ( Даташиты, Даташиты )

Номер в каталоге Описание Производители PDF
20 SN74LS724   Voltage Controlled Oscillator

DataShee Datasheet26.comom Datasheet26.comom DataSheet 4 U .com et4U.com DataShee Datasheet26.comom Datasheet26.comom DataSheet 4 U .com et4U.com Datasheet26.comom Datasheet26.comom DataSheet 4 U .com
Motorola Semiconductor
Motorola Semiconductor
pdf
19 SN74LS73A   Dual J-K Flip-Flops With Clear

Texas Instruments
Texas Instruments
pdf
18 SN74LS73A   DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP

DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP The SN54LS / 74LS73A offers individual J, K, clear, and clock inputs. These dual flip-flops are designed so that when the clock goes HIGH, the inputs are enabled and data will be accepted. The logic level of the J and K inputs may be allowed to change when the clock pulse is HIGH and the bistable will perform according to the truth table as long as minimum set-up times are observed. Input data is transferred to the outputs on the negative-going edge of the clock pulse. SN54/74L
Motorola
Motorola
pdf
17 SN74LS748   10-LINE-TO-4-LINE AND 8-LINE-TO-3-LINE PRIORITY ENCODERS

10-LINE-TO-4-LINE AND 8-LINE-TO-3-LINE PRIORITY ENCODERS The SN54 / 74LS147 and the SN54/ 74LS148 are Priority Encoders. They provide priority decoding of the inputs to ensure that only the highest order data line is encoded. Both devices have data inputs and outputs which are active at the low logic level. The LS147 encodes nine data lines to four-line (8-4-2-1) BCD. The implied decimal zero condition does not require an input condition because zero is encoded when all nine data lines are at a high logic level. The LS
Motorola
Motorola
pdf
16 SN74LS74A   Dual D-Type Positive-Edge -Triggered Flip-Flops With Preset And Clear

Texas Instruments
Texas Instruments
pdf
15 SN74LS74A   LOW POWER SCHOTTKY

SN74LS74A Dual D-Type Positive Edge-Triggered Flip-Flop The SN74LS74A dual edge-triggered flip-flop utilizes Schottky TTL circuitry to produce high speed D-type flip-flops. Each flip-flop has individual clear and set inputs, and also complementary Q and Q outputs. Information at input D is transferred to the Q output on the positive-going edge of the clock pulse. Clock triggering occurs at a voltage level of the clock pulse and is not directly related to the transition time of the positive-going pulse. When the clock in
ON Semiconductor
ON Semiconductor
pdf
14 SN74LS74A   DUAL D-TYPE POSITIVE EDGE-TRIGGERED FLIP-FLOP

DUAL D-TYPE POSITIVE EDGE-TRIGGERED FLIP-FLOP The SN54 / 74LS74A dual edge-triggered flip-flop utilizes Schottky TTL circuitry to produce high speed D-type flip-flops. Each flip-flop has individual clear and set inputs, and also complementary Q and Q outputs. Information at input D is transferred to the Q output on the positive-going edge of the clock pulse. Clock triggering occurs at a voltage level of the clock pulse and is not directly related to the transition time of the positive-going pulse. When the clock input i
Motorola
Motorola
pdf
13 SN74LS75   4-Bit Bistable Latches

Texas Instruments
Texas Instruments
pdf



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Номер в каталоге Описание Производители PDF
CD4515BC

The CD4514BC and CD4515BC are 4-to-16 line decoders with latched inputs implemented with complementary MOS (CMOS) circuits constructed with N- and P-channel enhancement mode transistors.

Fairchild Semiconductor
Fairchild Semiconductor
pdf
HV101WU1-1E6

HV101WU1-1E6 is a color active matrix TFT LCD module using amorphous silicon TFT's (Thin Film Transistors) as an active switching devices.

HYDIS
HYDIS
pdf

На первой странице data sheets приводятся:
свойства компонента (features), его основные параметры (quick reference data), обозначение на принципиальных схемах (symbol), краткое описание (general description).



Index : A    B    C    D    E    F    G    H    I    J    K    L    M    N    O    P    Q



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