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PDF MST716A-A Data sheet ( Hoja de datos )

Número de pieza MST716A-A
Descripción Small Size LCD TV Processor
Fabricantes Mstar 
Logotipo Mstar Logotipo



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No Preview Available ! MST716A-A Hoja de datos, Descripción, Manual

Edited by Foxit PDF Editor
Copyright (c) by Foxit Software Company, 2004
For Evaluation Only.
MST716A/MST716A-A
Small Size LCD TV Processor with Video Decoder
Preliminary Data Sheet Version 0.1
FEATURES
n Video Decoder
Ÿ Supports NTSC, PAL and SECAM video input
formats
Ÿ 2D NTSC and PAL comb-filter for Y/C
separation of CVBS input
Ÿ Single S-video and/or multiple CVBS inputs
Ÿ Supports closed-caption and V-chip
Ÿ ACC, AGC, and DCGC (Digital Chroma Gain
Control)
n Analog Input
Ÿ Supports RGB input format from PC, camcorders
and GPS
Ÿ Supports video input 480i, 480p, 576i, 576p,
720p, 1080i; RGB input resolution in 640x480,
800x480, and 800x600 (SVGA)
Ÿ 3-channel low-power 10-bit ADCs integration for
RGB
Ÿ Supports RGB composite sync input (CSYNC),
SOY, SOG, HSYNC, and VSYNC
Ÿ On-chip clock synthesizer and PLL
Ÿ Auto-position adjustment, auto-phase adjustment,
auto-gain adjustment, and auto-mode detection
n Digital Input
Ÿ Supports ITU656 input, progressive ITU656
compatible input format
n Color Engine
Ÿ Brightness, contrast, saturation, and hue
adjustment
Ÿ 9-tap programmable multi-purpose FIR (Finite
Impulse Response) filter
Ÿ Differential 3-band peaking engine
Ÿ Luminance Transient Improvement (LTI)
Ÿ Chrominance Transient Improvement (CTI)
Ÿ Black Level Extension (BLE)
Ÿ White Level Extension (WLE)
Ÿ Favor Color Compensation (FCC)
Ÿ 3-channel gamma curve adjustment
n Scaling Engine/TCON
Ÿ Supports analog panels with the resolution of
960x234, 1200x234, 1400x234, and more
Ÿ Supports various displaying modes
Ÿ Supports horizontal panorama scaling
n Miscellaneous
Ÿ Built-in MCU
Ÿ 3-wire serial bus interface for configuration setup
Ÿ Built-in VCOM DC level adjusting circuits
Ÿ Built-in internal OSD with 256 programmable
fonts, 16-color palettes, and 12-bit color
resolution
Ÿ 3-channel low-power 8-bit DAC integration for
RGB output, dynamic range 0.1-4.9V
Ÿ Built-in step-down PWM circuits for input 2.5V
Ÿ Built-in VCOM DC/AC level adjustment circuit
Ÿ Supports external OSD
Ÿ Spread spectrum clocks
Ÿ Optional 3.3V / 5V output pads with
programmable driving current
Ÿ 128-pin PQFP package
Version 0.1
-1-
Copyright © 2005 MStar Semiconductor, Inc. All rights reserved.
11/17/2005

1 page




MST716A-A pdf
Edited by Foxit PDF Editor
Copyright (c) by Foxit Software Company, 2004
For Evaluation Only.
MST716A/MST716A-A
Small Size LCD TV Processor with Video Decoder
Preliminary Data Sheet Version 0.1
PIN DESCRIPTION
Analog Interface
Pin Name
VMID
VCLAMP
REFM
REFP
SOGIN
BINP
BINM
GINP
GINM
RINP
RINM
C1INP
C1INM
YS1INP
YS1INM
CVBS1P
CVBS1M
CVBS2P
CVBS2M
HSYNCIN
VSYNCIN
Pin Type
Function
Pin
Mid-Scale Voltage Bypass
2
CVBS/YC Mode Clamp Voltage Bypass
3
Internal ADC Bottom De-coupling Pin
4
Internal ADC Top De-coupling Pin
5
Analog Input
Sync-on-Green slicer input
7
Analog Input
Analog B Input of VGA
8
Analog Input
Reference Ground for Analog B Input of VGA
9
Analog Input
Analog G Input of VGA
10
Analog Input
Reference Ground for Analog G Input of VGA
11
Analog Input
Analog R Input of VGA
12
Analog Input
Reference Ground for Analog R Input of VGA
13
Analog Input
Analog Chroma Input for TV S-Video1 /
Analog Composite Input of TV CVBS4
16
Analog Input
Reference Ground for Analog Chroma Input of TV 17
S-Video1 / Analog Composite Input of TV CVBS4
Analog Input
Analog Luma Input of TV S-Video1 /
Analog Composite Input of TV CVBS3
18
Analog Input
Reference Ground for Analog Luma Input of TV S-Video1 19
/
Analog Composite Input of TV CVBS3
Analog Input
Analog Composite Input for TV CVBS1
20
Analog Input
Reference Ground for Analog Composite Input of TV 21
CVBS1
Analog Input
Analog Composite Input for TV CVBS2
22
Analog Input
Reference Ground for Analog Composite Input of TV 23
CVBS2
Schmitt Trigger Input HSYNC / Composite Sync for VGA Input
w/ 5V-tolerant
124
Schmitt Trigger Input VSYNC for VGA Input
w/ 5V-tolerant
123
Digital Video Input Interface
Pin Name
CLKIN
VD[7:0]
Pin Type
Input w/5V-tolerant
Input w/5V-tolerant
Function
Sample Clock ITU656 Video Input
ITU656 Video Data bus
Pin
26
34-27
Version 0.1
-5-
Copyright © 2005 MStar Semiconductor, Inc. All rights reserved.
11/17/2005

5 Page





MST716A-A arduino
Edited by Foxit PDF Editor
Copyright (c) by Foxit Software Company, 2004
For Evaluation Only.
MST716A/MST716A-A
Small Size LCD TV Processor with Video Decoder
Preliminary Data Sheet Version 0.1
REGISTER DESCRIPTION
General Control Register
General Control Register
Index
00h
Name
REGBK
XTAL_OK (RO)
MCU_SEL (RO)
Bits
7:0
7
6
-
AINC
5:4
3
-
REGBK[1:0]
2
1:0
01h ~ -
FFh -
7:0
7:0
Description
Default : 0x00
Access : R/W
Crystal ready.
0: Embedded MCU.
1: External serial bus interface.
Reserved.
Serial bus address auto Increase.
0: Enable.
1: Disable.
Reserved.
Register Bank Select.
00: Register of scaler.
01: Register of ADC/ACE/MCU.
10: Register of Video Decoder Front End (VFE).
11: Register of Video Decoder 2D Comb Filter (VCF).
Default : -
Access : -
Reserved.
Scaler Register (Bank = 00, Registers 01h ~ 9Fh)
Scaler Register (Bank=00, Registers 01h ~ 9Fh)
Index
01h
Name
DBFC
-
DBL[1:0]
DB_EN
02h ISELECT
NIS
STYPE[1:0]
Bits Description
7:0 Default : 0x80
Access : R/W
7:3 Reserved.
2:1 Double Buffer Load.
00: Keep old register value.
01: Load new data (auto reset to 00 when load finish).
10: Automatically load data at VSYNC blanking.
11: Reserved.
0 Double Buffer Enable.
0: Disable.
1: Enable.
7:0 Default : 0x00
Access : R/W
7 No Input Source.
0: Input source active.
1: Input source inactive, output is free-run.
6:5 Input Sync Type.
00: Auto detected.
01: Input is separated HSYNC and VSYNC.
10: Input is Composite sync.
11: Input is sync-on-green (SOG).
Version 0.1
- 11 -
Copyright © 2005 MStar Semiconductor, Inc. All rights reserved.
11/17/2005

11 Page







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