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PDF LTC2264-14 Data sheet ( Hoja de datos )
| Número de pieza | LTC2264-14 | |
| Descripción | Low Power Dual ADCs | |
| Fabricantes | Linear | |
| Logotipo |  |
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LTC2265-14/
LTC2264-14/LTC2263-14
14-Bit, 65Msps/40Msps/
25Msps Low Power Dual ADCs
FEATURES
n 2-Channel Simultaneous Sampling ADC
n 73.7dB SNR
n 90dB SFDR
n Low Power: 171mW/113mW/94mW Total
n 85mW/56mW/47mW per Channel
n Single 1.8V Supply
n Serial LVDS Outputs: 1 or 2 Bits per Channel
n Selectable Input Ranges: 1VP-P to 2VP-P
n 800MHz Full Power Bandwidth S/H
n Shutdown and Nap Modes
n Serial SPI Port for Configuration
n Pin Compatible 14-Bit and 12-Bit Versions
n 40-Pin (6mm × 6mm) QFN Package
APPLICATIONS
n Communications
n Cellular Base Stations
n Software Defined Radios
n Portable Medical Imaging
n Multichannel Data Acquisition
n Nondestructive Testing
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear
Technology Corporation. All other trademarks are the property of their respective owners.
DESCRIPTION
The LTC®2265-14/LTC2264-14/LTC2263-14 are 2-channel,
simultaneous sampling 14-bit A/D converters designed
for digitizing high frequency, wide dynamic range signals.
They are perfect for demanding communications applica-
tions with AC performance that includes 73.7dB SNR and
90dB spurious free dynamic range (SFDR). Ultralow jitter
of 0.15psRMS allows undersampling of IF frequencies with
excellent noise performance.
DC specs include ±1LSB INL (typ), ±0.3LSB DNL (typ)
and no missing codes over temperature. The transition
noise is a low 1.2LSBRMS.
The digital outputs are serial LVDS to minimize the num-
ber of data lines. Each channel outputs two bits at a time
(2-lane mode) or one bit at a time (1-lane mode). The LVDS
drivers have optional internal termination and adjustable
output levels to ensure clean signal integrity.
The ENC+ and ENC– inputs may be driven differentially
or single-ended with a sine wave, PECL, LVDS, TTL, or
CMOS inputs. An internal clock duty cycle stabilizer
allows high performance at full speed for a wide range of
clock duty cycles.
TYPICAL APPLICATION
CH.1
ANALOG
INPUT
CH.2
ANALOG
INPUT
ENCODE
INPUT
+
–S/H
+
–S/H
1.8V
VDD
14-BIT
ADC CORE
14-BIT
ADC CORE
PLL
GND
1.8V
OVDD
DATA
SERIALIZER
OUT1A
OUT1B
OUT2A
OUT2B
DATA
CLOCK
OUT
FRAME
OGND
226514 TA01
SERIALIZED
LVDS
OUTPUTS
LTC2265-14, 65Msps,
2-Tone FFT, fIN = 70MHz and 75MHz
0
–10
–20
–30
– 40
–50
–60
–70
–80
–90
–100
–110
–120
0
10 20
FREQUENCY (MHz)
30
226514 TA02
22654314fb
1
1 page  
LTC2265-14/
LTC2264-14/LTC2263-14
D IGITAL INPUTS AND OUTPUTS The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. (Note 5)
SYMBOL PARAMETER
CONDITIONS
MIN TYP MAX UNITS
Single-Ended Encode Mode (ENC– Tied to GND)
VIH High Level Input Voltage
VDD = 1.8V
l 1.2
V
VIL Low Level Input Voltage
VDD = 1.8V
l
0.6 V
VIN Input Voltage Range
ENC+ to GND
l0
3.6 V
RIN Input Resistance
(See Figure 11)
30 kΩ
CIN Input Capacitance
3.5 pF
DIGITAL INPUTS (CS, SDI, SCK in Serial or Parallel Programming Mode. SDO in Parallel Programming Mode)
VIH High Level Input Voltage
VDD = 1.8V
l 1.3
V
VIL Low Level Input Voltage
VDD = 1.8V
l
0.6 V
IIN Input Current
VIN = 0V to 3.6V
l –10
10 µA
CIN Input Capacitance
3 pF
SDO OUTPUT (Serial Programming Mode. Open-Drain Output. Requires 2kΩ Pull-Up Resistor if SDO Is Used)
ROL Logic Low Output Resistance to GND
IOH Logic High Output Leakage Current
COUT Output Capacitance
DIGITAL DATA OUTPUTS
VDD = 1.8V, SDO = 0V
SDO = 0V to 3.6V
200 Ω
l –10
10 µA
3 pF
VOD Differential Output Voltage
100Ω Differential Load, 3.5mA Mode
l 247
350
454 mV
100Ω Differential Load, 1.75mA Mode
l 125
175
250 mV
VOS Common Mode Output Voltage
100Ω Differential Load, 3.5mA Mode
100Ω Differential Load, 1.75mA Mode
l 1.125
l 1.125
1.250
1.250
1.375
1.375
V
V
RTERM On-Chip Termination Resistance
Termination Enabled, OVDD = 1.8V
100 Ω
POWER REQUIREMENTS The l denotes the specifications which apply over the full operating temperature
range, otherwise specifications are at TA = 25°C. (Note 9)
LTC2265-14
LTC2264-14
LTC2263-14
SYMBOL PARAMETER
CONDITIONS
MIN TYP MAX MIN TYP MAX MIN TYP MAX UNITS
VDD
OVDD
IVDD
IOVDD
Analog Supply Voltage (Note 10)
l 1.7 1.8 1.9 1.7 1.8 1.9 1.7 1.8 1.9
Output Supply Voltage (Note 10)
l 1.7 1.8 1.9 1.7 1.8 1.9 1.7 1.8 1.9
Analog Supply Current Sine Wave Input
l 84 98
53 63
42 50
Digital Supply Current
1-Lane Mode, 1.75mA Mode
1-Lane Mode, 3.5mA Mode
2-Lane Mode, 1.75mA Mode
2-Lane Mode, 3.5mA Mode
l
l
11
20
15 18
28 32
10
19
15 17
28 31
10
18
14 17
27 31
V
V
mA
mA
mA
mA
mA
PDISS Power Dissipation
1-Lane Mode, 1.75mA Mode
1-Lane Mode, 3.5mA Mode
2-Lane Mode, 1.75mA Mode
2-Lane Mode, 3.5mA Mode
l
l
171
187
178 209
202 234
113
130
122 144
146 169
94
108
101 121
124 146
mW
mW
mW
mW
PSLEEP Sleep Mode Power
1 1 1 mW
PNAP Nap Mode Power
60 60 60 mW
PDIFFCLK
Power Increase with Differential Encode Mode Enabled
(No Increase for Sleep Mode)
20
20
20 mW
22654314fb
5
5 Page 
LTC2265-14/
LTC2264-14/LTC2263-14
TYPICAL PERFORMANCE CHARACTERISTICS
LTC2265-14: SFDR vs Input
Frequency, –1dBFS, 2V Range,
65Msps
95
90
85
80
75
70
65
0 50 100 150 200 250 300 350
INPUT FREQUENCY (MHz)
226514 G10
LTC2265-14: SFDR vs Input Level,
fIN = 70MHz, 2V Range, 65Msps
110
100 dBFS
90
80
70
60
50 dBc
40
30
20
10
0
–80 –70 –60 –50 –40 –30 –20 –10
INPUT LEVEL (dBFS)
0
226514 G11
L5TMCH22z6S5i-n1e4W: IaVDvDe
vs Sample Rate,
Input, –1dBFS
90
85
IWOVaDvDe
vs Sample Rate,
Input, –1dBFS
5MHz
Sine
30
2-LANE, 3.5mA
80 20 1-LANE, 3.5mA
2-LANE, 1.75mA
75
70 10
1-LANE, 1.75mA
65
60
0 10 20 30 40 50 60
SAMPLE RATE (Msps)
226514 G13
LTC2264-14: Integral Nonlinearity
(INL)
2.0
1.5
1.0
0.5
0
–0.5
–1.0
–1.5
–2.0
0
4096
8192
12288
OUTPUT CODE
16384
226514 G16
0
0 20 40 60
SAMPLE RATE (Msps)
226514 G14
LTC2264-14: Differential
Nonlinearity (DNL)
1.0
0.8
0.6
0.4
0.2
0
– 0.2
– 0.4
– 0.6
– 0.8
–1.0
0
4096
8192
12288
OUTPUT CODE
16384
226514 G17
LTC2265-14: SNR vs Input Level,
fIN = 70MHz, 2V Range, 65Msps
80 dBFS
70
60
dBc
50
40
30
20
10
0
–60 –50 –40 –30 –20 –10
INPUT LEVEL (dBFS)
0
226514 G12
LTC2265-14: SNR vs SENSE,
fIN = 5MHz, –1dBFS
75
74
73
72
71
70
69
68
67
0.6 0.7 0.8 0.9 1 1.1 1.2 1.3
SENSE PIN (V)
226514 G15
LTC2264-14: 8k
5MHz, –1dBFS,
Point FFT,
40Msps
fIN
=
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
–110
–120
0
10
FREQUENCY (MHz)
20
226514 G18
22654314fb
11
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet LTC2264-14.PDF ] | |
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