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PDF FAN48632 Data sheet ( Hoja de datos )
| Número de pieza | FAN48632 | |
| Descripción | 2.0A Pulsed-Load Synchronous TinyBoost Regulator | |
| Fabricantes | Fairchild Semiconductor | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de FAN48632 (archivo pdf) en la parte inferior de esta página. Total 13 Páginas | ||
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April 2014
FAN48632
2.5 MHz, 2.0 A Pulsed-Load Synchronous TinyBoost™
Regulator with Bypass Mode for GSM PA Supply
Features
Few External Components: 0.47 µH Inductor and
0603 Case Size Input and Output Capacitors
Input Voltage Range: 2.35 V to 5.5 V
Fixed Output Voltage : 3.3 V, 3.5 V
Maximum Continuous Load Current of: 1.5 A
at VIN of 2.6 V
Maximum Pulsed Load current :of 2.0 A for GSM 217 Hz
repetition rate ,boosting VOUT to 3.3 V or 3.5 V
Up to 96% Efficient
True Bypass Operation when VIN > Target VOUT
Internal Synchronous Rectifier
Soft-Start with True Load Disconnect
Forced Bypass Mode
VSEL Control to Optimize Target VOUT
Short-Circuit Protection
Low Operating Quiescent Current
16-Bump, 0.4 mm Pitch WLCSP
Applications
Boost for Low-Voltage Li-ion Batteries, Brownout
Prevention, Supply GSM RF PA.
Cell Phones, Smart Phones, Tablets
Description
The FAN48632 allows systems to take advantage of new
battery chemistries that can supply significant energy when
the battery voltage is lower than the required voltage for
system power ICs. By combining built-in power transistors,
synchronous rectification, and low supply current; this IC
provides a compact solution for systems using advanced
Li-Ion battery chemistries.
The FAN48632 is a boost regulator designed to provide a
minimum output voltage (VOUT(MIN)) from a single-cell Li-Ion
battery, even when the battery voltage is below system
minimum. In boost mode, output voltage regulation is
guaranteed to a maximum load current of 1.5 A continuous
and 2.0 A pulsed. Quiescent current in Shutdown Mode is less
than 3 µA, which maximizes battery life. The regulator
transitions smoothly between Bypass and normal Boost Mode.
The device can be forced into Bypass Mode to reduce
quiescent current.
The FAN48632 is available in a 16-bump, 0.4 mm pitch,
Wafer-Level Chip-Scale Package (WLCSP).
+
Battery
0.47H
VIN
CIN
10F
SW
VSEL
EN
BYP
FAN48632
VOUT
COUT
40F
PGND
AGND
PG
SYSTEM
LOAD
Figure 1. Typical Application
Ordering Information
Part Number
Output Voltage
VSEL0 / VSEL1
Soft-Start
Forced Operating
Bypass Temperature
Package
Packing
FAN48632UC33X
FAN48632BUC33X(1)
3.30 / 3.49
3.30 / 3.49
FAST
FAST
Low IQ
Low IQ
FAN48632UC35X
3.50 / 3.70
FAST
Low IQ
Note:
1. The FAN48632BUC33X includes backside lamination.
16-Ball, 4x4 Array, 0.4 mm
-40°C to 85°C Pitch, 250 µm Ball, Wafer-Level
Chip-Scale Package (WLCSP)
Tape
and
Reel
© 2013 Fairchild Semiconductor Corporation
FAN48632 • Rev. 1.0.3
www.fairchildsemi.com
1 page  
Electrical Specifications
Recommended operating conditions, unless otherwise noted, circuit per Figure 1, VIN = 2.35 V to VOUT, TA = -40˚C to 85˚C.
Typical values are given VIN = 3.0 V and TA = 25˚C.
Symbol
IQ
ILK
ILK_OUT
VUVLO
VUVLO_HYS
VPG(OL)
IPG_LK
VIH
VIL
RLOW
IPD
VREG
VTRSP
tON
fSW
IV_LIM
IV_LIM_SS
ISS_PK
tSS
VOVP
VOVP_HYS
RDS(ON)N
RDS(ON)P
RDS(ONBYP
T120A
T120R
T150T
T150H
tRST
Parameter
VIN Quiescent Current
VOUT to VIN Reverse Leakage
VOUT Leakage Current
Under-Voltage Lockout
Under-Voltage Lockout Hysteresis
PG Low
PG Leakage Current
Logic Level High EN, VSEL, BYP
Logic Level Low EN, VSEL, BYP
Logic Control Pin Pull Downs
(LOW Active)
Weak Current Source Pull-Down
Output Voltage Accuracy
Load Transient Response
On-Time
Switching Frequency
Boost Valley Current Limit
Boost Valley Current Limit During
SS
Soft-Start Input Current Limit
Soft-Start EN HIGH to Regulation
Output Over-Voltage Protection
Threshold
Output Over-Voltage Protection
Hysteresis
N-Channel Boost Switch RDS(ON)
P-Channel Sync Rectifier RDS(ON)
P-Channel Bypass Switch RDS(ON)
T120 Activation Threshold
T120 Release Threshold
T150 Threshold
T150 Hysteresis
FAULT Restart Timer
Conditions
Bypass Mode VOUT=3.5 V, VIN=4.2 V
Boost Mode VOUT=3.5 V, VIN=2.5 V
Shutdown: EN=0, VIN=3.0 V
Forced Bypass Mode,
VIN=3.5 V
Low IQ
VOUT=5 V, EN=0
VOUT=0, EN=0, VIN=4.2 V
VIN Rising
IPG=5 mA
VPG=5 V
BYP, VSEL, EN
BYP, VSEL, EN
Target VOUT relative to GND, DC,
VOUT-VIN > 100 mV
500 – 1250 mA, VIN=3.0 V
VIN=3.0 V, VOUT=3.5 V, Load >1 A
VIN=3.0 V, VOUT=3.5 V, Load=1 A
VIN=2.6 V
VIN=2.6 V
LIN1
LIN2
Fast, 50 Load
Fast
Fast
VIN=3.5 V
VIN=3.5 V
VIN=3.5 V
Min.
1.2
Typ.
140
150
1.5
4
0.2
0.1
2.20
200
Max.
190
250
5.0
Unit
A
A
A
10 A
1.0 A
1.0 A
2.35 V
mV
0.4 V
1 µA
V
0.4 V
300 k
100 nA
–2 4 %
±4 %
80 ns
2.0 2.5 3.0 MHz
3.3 3.7 4.1 A
1.8 A
900
1800
600
mA
mA
s
6.0 6.3 V
300 mV
85 120 mΩ
65 85 mΩ
65 85 mΩ
120 °C
100 °C
150 °C
20 °C
20 ms
© 2013 Fairchild Semiconductor Corporation
FAN48632 • Rev. 1.0.3
5
www.fairchildsemi.com
5 Page 
Application Information
Output Capacitance (COUT)
Stability
The effective capacitance (CEFF) of small, high-value, ceramic
capacitors decreases as bias voltage increases.
FAN48632 is guaranteed for stable operation with the
minimum value of CEFF (CEFF(MIN)) of 14 F.
CEFF varies with manufacturer, material, and case size.
Inductor Selection
The recommended nominal inductance value is 0.47 H.
FAN48632 employs valley-current limiting; peak inductor
current can exceed4.4 A for a short duration during overload
conditions. Saturation effects cause the inductor current ripple
to become higher under high loading as only valley of the
inductor current ripple is controlled..
Startup
Input current limiting is in effect during soft-start, which limits
the current available to charge COUT and any additional
capacitance on the VOUT line. If the output fails to achieve
regulation within the limits described in the Startup section, a
FAULT occurs, causing the circuit to shut down then restart
after a significant time period. If the total combined output
capacitance is very high, the circuit may not start on the first
attempt, but eventually achieves regulation if no load is
present. If a high-current load and high capacitance are both
present during soft-start, the circuit may fail to achieve
regulation and continually attempts soft-start, only to have
the output capacitance discharged by the load when in a
FAULT state.
Output Voltage Ripple
Output voltage ripple is inversely proportional to COUT. During
tON, when the boost switch is on, all load current is supplied by
COUT. Output ripple is calculated as:
VRIPPLE (PP)
tON
I LOAD
COUT
and
EQ. 3
tON
tSW
D
tSW
1
VIN
VOUT
therefore:
EQ. 4
VRIPPLE (P P)
tSW
1
VIN
VOUT
I LOAD
COUT
and
tSW
1
fSW
EQ. 5
EQ. 6
As can be seen from EQ. 5, the maximum VRIPPLE occurs
when VIN is at minimum and ILOAD is at maximum.
2.0 A Pulsed Loads for GSM Applications
The FAN48632 can support 2 A load pulses for GSM and
GSM Edge applications, according to the minimum VIN levels
shown in Figure 23.
Figure 23. Minimum VIN for 2 A GSM Pulse, 3.5 VOUT
Results shown use circuit/components of Figure 1 with device
mounted on standard evaluation platform (layout Figure 24).
Layout Recommendation
To minimize spikes at VOUT, COUT must be placed as close as
possible to PGND and VOUT, as shown in Figure 24. The
associated PGND and VOUT routes are best made directly on
the top copper layer, rather than thru vias.
For thermal reasons, it is suggested to maximize the pour
area for all planes other than SW. Especially the ground pour
should be set to fill all available PCB surface area and tied to
internal layers with a cluster of thermal vias.
Figure 24. Layout Recommendation
© 2013 Fairchild Semiconductor Corporation
FAN48632 • Rev. 1.0.3
11
www.fairchildsemi.com
11 Page | ||
| Páginas | Total 13 Páginas | |
| PDF Descargar | [ Datasheet FAN48632.PDF ] | |
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