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PDF ICM7555 Data sheet ( Hoja de datos )
| Número de pieza | ICM7555 | |
| Descripción | General Purpose Timers | |
| Fabricantes | Harris | |
| Logotipo |  |
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ICM7555, ICM7556
SEMICONDUCTOR
November 1996
General Purpose Timers
Features
• Exact Equivalent in Most Cases for SE/NE555/556 or
TLC555/556
• Low Supply Current
- ICM7555. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60µA
- ICM7556. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120µA
• Extremely Low Input Currents . . . . . . . . . . . . . . . 20pA
• High Speed Operation . . . . . . . . . . . . . . . . . . . . . . 1MHz
• Guaranteed Supply Voltage Range . . . . . . . 2V to 18V
• Temperature Stability . . . . . . . . . . . . 0.005%/oC at 25oC
• Normal Reset Function - No Crowbarring of Supply
During Output Transition
• Can be Used with Higher Impedance Timing Elements
than Regular 555/6 for Longer RC Time Constants
• Timing from Microseconds through Hours
• Operates in Both Astable and Monostable Modes
• Adjustable Duty Cycle
• High Output Source/Sink Driver can Drive TTL/CMOS
• Outputs have Very Low Offsets, HI and LO
Applications
• Precision Timing
• Pulse Generation
• Sequential Timing
• Time Delay Generation
• Pulse Width Modulation
• Pulse Position Modulation
• Missing Pulse Detector
Description
The ICM7555 and ICM7556 are CMOS RC timers providing
significantly improved performance over the standard SE/NE555/6
and 355 timers, while at the same time being direct replacements for
those devices in most applications. Improved parameters include low
supply current, wide operating supply voltage range, low
THRESHOLD, TRIGGER and RESET currents, no crowbarring of
the supply current during output transitions, higher frequency
performance and no requirement to decouple CONTROL VOLTAGE
for stable operation.
Specifically, the ICM7555 and ICM7556 are stable controllers capa-
ble of producing accurate time delays or frequencies. The ICM7556
is a dual ICM7555, with the two timers operating independently of
each other, sharing only V+ and GND. In the one shot mode, the
pulse width of each circuit is precisely controlled by one external
resistor and capacitor. For astable operation as an oscillator, the
free running frequency and the duty cycle are both accurately con-
trolled by two external resistors and one capacitor. Unlike the regu-
lar bipolar 555/6 devices, the CONTROL VOLTAGE terminal need
not be decoupled with a capacitor. The circuits are triggered and
reset on falling (negative) waveforms, and the output inverter can
source or sink currents large enough to drive TTL loads, or provide
minimal offsets to drive CMOS loads.
Ordering Information
PART NUMBER
(BRAND)
TEMP.
RANGE (oC) PACKAGE
PKG.
NO.
ICM7555CBA
(7555CBA)
0 to 70 8 Ld SOIC
M18.5
ICM7555IBA
(7555IBA)
-25 to 85 8 Ld SOIC
M18.5
ICM7555IPA
-25 to 85 8 Ld PDIP
E8.3
ICM7555ITV
-25 to 85 8 Pin Metal Can T8.C
ICM7555MTV (Note) -55 to 125 8 Pin Metal Can T8.C
ICM7556IPD
-25 to 85 14 Ld PDIP E14.3
ICM7556MJD (Note) -55 to 125 14 Ld CERDIP F14.3
NOTE: Add /883B to part number if 883B processing is desired.
Pinouts
ICM7555 (PDIP, SOIC)
TOP VIEW
ICM7555 (METAL CAN)
TOP VIEW
ICM7556 (PDIP, CERDIP)
TOP VIEW
GND 1
TRIGGER 2
OUTPUT 3
RESET 4
8 VDD
7 DISCHARGE
6 THRESHOLD
5 CONTROL
VOLTAGE
GND
TRIGGER 2
VDD AND CASE
8
1 7 DISCHARGE
6 THRESHOLD
DISCHARGE 1
THRESH-
OLD
2
CONTROL
VOLTAGE
3
RESET 4
OUTPUT 3
4
RESET
5 CONTROL
VOLTAGE
OUTPUT 5
TRIGGER 6
GND 7
14 VDD
13 DISCHARGE
12 THRESHOLD
11
CONTROL
VOLTAGE
10 RESET
9 OUTPUT
8 TRIGGER
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
Copyright © Harris Corporation 1996
8-170
File Number 2867.2
1 page  
ICM7555, ICM7556
Power Supply Considerations
Although the supply current consumed by the ICM7555/6
devices is very low, the total system supply current can be
high unless the timing components are high impedance.
Therefore, use high values for R and low values for C in Fig-
ures 2 and 3.
Output Drive Capability
The output driver consists of a CMOS inverter capable of
driving most logic families including CMOS and TTL. As
such, if driving CMOS, the output swing at all supply volt-
ages will equal the supply voltage. At a supply voltage of
4.5V or more the ICM7555/6 will drive at least 2 standard
TTL loads.
Astable Operation
The circuit can be connected to trigger itself and free run as
a multivibrator, see Figure 2A. The output swings from rail to
rail, and is a true 50% duty cycle square wave. (Trip points
and output swings are symmetrical). Less than a 1% fre-
quency variation is observed, over a voltage range of +5V to
+15V.
Monostable Operation
In this mode of operation, the timer functions as a one-shot,
see Figure 3. Initially the external capacitor (C) is held dis-
charged by a transistor inside the timer. Upon application of
a negative TRIGGER pulse to pin 2, the internal flip-flop is
set which releases the short circuit across the external
capacitor and drives the OUTPUT high. The voltage across
the capacitor now increases exponentially with a time con-
2s/ta3nVt+t ,=thReAcCo.mWphaerantothrerevsoelttasgteheacflriops-flsotph,ewchaipcahciintotruernqudaisls-
charges the capacitor rapidly and also drives the OUTPUT
to its low state. TRIGGER must return to a high state before
the OUTPUT can return to a low state.
tOUTPUT = -ln (1/3) RAC = 1.1RAC
VDD
RA
18
TRIGGER
OUTPUT
RESET
DISCHARGE
27
ICM7555
THRESHOLD
36
CONTROL
4 5 VOLTAGE
f = 1----.-4---1--R-----C---
The timer can also be connected as shown in Figure 2B. In
this circuit, the frequency is:
VDD ≤18V
OPTIONAL
CAPACITOR
FIGURE 3. MONOSTABLE OPERATION
C
f = 1.44 ⁄ (RA + 2RB)C
The duty cycle is controlled by the values of RA and RB, by
the equation:
D = (RA + RB) ⁄ (RA + 2RB)
VDD
OUTPUT
GND
1
TRIGGER
2
VDD
3
4
RESET
VDD
8
10K
DISCHARGE
7
ALTER-
NATE
THRESHOLD
6
OUTPUT
5
CONTROL
VOLTAGE
R
C
OPTIONAL
CAPACITOR
FIGURE 2A. ASTABLE OPERATION
VDD
RA
18
27
OUTPUT
VDD
3
4
6
5 RB
Control Voltage
The CONTROL VOLTAGE terminal permits the two trip
voltages for the THRESHOLD and TRIGGER internal
comparators to be controlled. This provides the possibility of
oscillation frequency modulation in the astable mode or even
inhibition of oscillation, depending on the applied voltage. In
the monostable mode, delay times can be changed by
varying the applied voltage to the CONTROL VOLTAGE pin.
RESET
The RESET terminal is designed to have essentially the same
trip voltage as the standard bipolar 555/6, i.e., 0.6V to 0.7V. At
all supply voltages it represents an extremely high input
impedance. The mode of operation of the RESET function is,
however, much improved over the standard bipolar 555/6 in
that it controls only the internal flip-flop, which in turn controls
simultaneously the state of the OUTPUT and DISCHARGE
pins. This avoids the multiple threshold problems sometimes
encountered with slow falling edges in the bipolar devices.
C OPTIONAL
CAPACITOR
FIGURE 2B. ALTERNATE ASTABLE CONFIGURATION
8-174
5 Page | ||
| Páginas | Total 7 Páginas | |
| PDF Descargar | [ Datasheet ICM7555.PDF ] | |
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