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NCV33072 Datasheet Download - ON Semiconductor

Номер произв NCV33072
Описание Single Supply 3.0 V to 44 V Operational Amplifiers
Производители ON Semiconductor
логотип ON Semiconductor логотип 

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NCV33072 Даташит, Описание, Даташиты
MC34071,2,4,A
MC33071,2,4,A,
NCV33072,4,A
Single Supply 3.0 V to 44 V
Operational Amplifiers
Quality bipolar fabrication with innovative design concepts are
employed for the MC33071/72/74, MC34071/72/74, NCV33072/74A
series of monolithic operational amplifiers. This series of operational
amplifiers offer 4.5 MHz of gain bandwidth product, 13 V/ms slew rate
and fast settling time without the use of JFET device technology.
Although this series can be operated from split supplies, it is
particularly suited for single supply operation, since the common
mode input voltage range includes ground potential (VEE). With a
Darlington input stage, this series exhibits high input resistance, low
input offset voltage and high gain. The all NPN output stage,
characterized by no deadband crossover distortion and large output
voltage swing, provides high capacitance drive capability, excellent
phase and gain margins, low open loop high frequency output
impedance and symmetrical source/sink AC frequency response.
The MC33071/72/74, MC34071/72/74, NCV33072/74,A series of
devices are available in standard or prime performance (A Suffix)
grades and are specified over the commercial, industrial/vehicular or
military temperature ranges. The complete series of single, dual and
quad operational amplifiers are available in plastic DIP, SOIC, QFN
and TSSOP surface mount packages.
Features
Wide Bandwidth: 4.5 MHz
High Slew Rate: 13 V/ms
Fast Settling Time: 1.1 ms to 0.1%
Wide Single Supply Operation: 3.0 V to 44 V
Wide Input Common Mode Voltage Range: Includes Ground (VEE)
Low Input Offset Voltage: 3.0 mV Maximum (A Suffix)
Large Output Voltage Swing: −14.7 V to +14 V (with ±15 V
Supplies)
Large Capacitance Drive Capability: 0 pF to 10,000 pF
Low Total Harmonic Distortion: 0.02%
Excellent Phase Margin: 60°
Excellent Gain Margin: 12 dB
Output Short Circuit Protection
ESD Diodes/Clamps Provide Input Protection for Dual and Quad
NCV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q100
Qualified and PPAP Capable
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
http://onsemi.com
8
1
8
1
PDIP−8
P SUFFIX
CASE 626
SOIC−8
D SUFFIX
CASE 751
WQFN10
MT SUFFIX
CASE 510AJ
14
1
14
1
PDIP−14
P SUFFIX
CASE 646
SOIC−14
D SUFFIX
CASE 751A
14
1
TSSOP−14
DTB SUFFIX
CASE 948G
ORDERING INFORMATION
See detailed ordering and shipping information on page 18 of
this data sheet.
DEVICE MARKING INFORMATION
See general marking information in the device marking
section on page 21 of this data sheet.
© Semiconductor Components Industries, LLC, 2014
July, 2014 − Rev. 22
1
Publication Order Number:
MC34071/D







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NCV33072 Даташит, Описание, Даташиты
MC34071,2,4,A MC33071,2,4,A, NCV33072,4,A
CASE 626/CASE 751
Offset Null 1
8 NC
Inputs
2
3
VEE 4
-
+
7 VCC
6 Output
5 Offset Null
(Single, Top View)
Output 1 1
2-
Inputs 1 +
3
VEE 4
8 VCC
7 Output 2
-6
+
Inputs 2
5
(Dual, Top View)
PIN CONNECTIONS
CASE 646/CASE 751A/CASE 948G
Output 1 1
2
Inputs 1
-1
+
3
VCC 4
Inputs 2
5
6
+
-
2
Output 2 7
14 Output 4
4
13
-
+
12
Inputs 4
11 VEE
3 + 10
-9
Inputs 3
8 Output 3
(Quad, Top View)
CASE 510AJ
Output 1
NC
In ­ 1
In + 1
1
2
3
­
4
VCC
10
5
9 Output 2
8 NC
7 In ­ 2
6 In + 2
VEE/GND
(Top View)
Q1
Q2
-
Inputs
+
Bias
Q3
Q8
Q4
R1 C1
R2
Q9 Q10
Base
Current
Cancellation
Q13
Q12
D1
R3 R4
Q5 Q6 Q7
VCC
Q11
Q14
Q17
D2
C2
Q18
R6 R7
Output
R8
D3
Q19
Q15 Q16
Current
R5 Limit
Offset Null
(MC33071, MC34071 only)
Figure 1. Representative Schematic Diagram
(Each Amplifier)
VEE/GND
http://onsemi.com
2







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NCV33072 Даташит, Описание, Даташиты
MC34071,2,4,A MC33071,2,4,A, NCV33072,4,A
MAXIMUM RATINGS
Rating
Symbol
Value
Unit
Supply Voltage (from VEE to VCC)
VS +44
V
Input Differential Voltage Range
VIDR
(Note 1)
V
Input Voltage Range
VIR (Note 1)
V
Output Short Circuit Duration (Note 2)
tSC Indefinite Sec
Operating Junction Temperature
TJ +150 °C
Storage Temperature Range
Tstg −60 to +150
°C
ESD Capability, Dual and Quad (Note 3)
Human Body Model
Machine Model
ESDHBM
ESDMM
2000
200
V
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. Either or both input voltages should not exceed the magnitude of VCC or VEE.
2. Power dissipation must be considered to ensure maximum junction temperature (TJ) is not exceeded (see Figure 2).
3. This device series incorporates ESD protection and is tested by the following methods:
ESD Human Body Model tested per AEC−Q100−002 (JEDEC standard: JESD22−A114)
ESD Machine Model tested per AEC−Q100−003 (JEDEC standard: JESD22−A115)
http://onsemi.com
3










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