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24AA02 PDF даташит

Спецификация 24AA02 изготовлена ​​​​«Microchip» и имеет функцию, называемую «EEPROM».

Детали детали

Номер произв 24AA02
Описание EEPROM
Производители Microchip
логотип Microchip логотип 

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24AA02 Даташит, Описание, Даташиты
24AA02/24LC02B
2K I2CSerial EEPROM
Device Selection Table
Part
Number
VCC
Range
Max. Clock
Frequency
24AA02
1.7-5.5 400 kHz(1)
24LC02B
2.5-5.5 400 kHz
Note 1: 100 kHz for VCC <2.5V.
Temp.
Ranges
I
I, E
Features:
• Single Supply with Operation down to 1.7V for
24AA02 Devices, 2.5V for 24LC02B Devices
• Low-Power CMOS Technology:
- Read current 1 mA, max.
- Standby current 1 μA, max. (I-temp)
• 2-Wire Serial Interface, I2C™ Compatible
• Schmitt Trigger inputs for Noise Suppression
• Output Slope Control to eliminate Ground Bounce
• 100 kHz and 400 kHz Clock Compatibility
• Page Write Time 3 ms, typical
• Self-Timed Erase/Write Cycle
• 8-Byte Page Write Buffer
• Hardware Write-Protect
• ESD Protection >4,000V
• More than 1 Million Erase/Write Cycles
• Data Retention >200 Years
• Factory Programming Available
• Packages include 8-lead PDIP, SOIC, TSSOP,
DFN, TDFN, MSOP, 5-lead SOT-23 and SC-70
• Pb-free and RoHS Compliant
• Temperature Ranges:
- Industrial (I): -40°C to +85°C
- Automotive (E): -40°C to +125°C
Description:
The Microchip Technology Inc. 24AA02/24LC02B
(24XX02*) is a 2 Kbit Electrically Erasable PROM. The
device is organized as one block of 256 x 8-bit memory
with a 2-wire serial interface. Low-voltage design
permits operation down to 1.7V, with standby and
active currents of only 1 μA and 1 mA, respectively.
The 24XX02 also has a page write capability for up to
8 bytes of data. The 24XX02 is available in the
standard 8-pin PDIP, surface mount SOIC, TSSOP, 2x3
DFN, 2x3 TDFN and MSOP packages and is also avail-
able in the 5-lead SOT-23 and SC-70 packages.
Package Types
PDIP, MSOP
SOIC, TSSOP
A0 1
A1 2
A2 3
VSS 4
8 VCC A0
7 WP A1
6 SCL A2
5 SDA VSS
1
2
3
4
8 VCC
7 WP
6 SCL
5 SDA
SOT-23/SC-70
DFN/TDFN
SCL 1
Vss
SDA
2
3
5 WP
4 Vcc
A0 1
A1 2
A2 3
VSS 4
8 VCC
7 WP
6 SCL
5 SDA
Note:
Pins A0, A1 and A2 are not used by the 24XX02. (No
internal connections).
Block Diagram
WP
HV
Generator
I/O
Control
Logic
I/O
SCL
SDA
VCC
VSS
Memory
Control
Logic
XDEC
EEPROM
Array
Page
Latches
YDEC
Sense Amp.
R/W Control
© 2009 Microchip Technology Inc.
DS21709J-page 1









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24AA02 Даташит, Описание, Даташиты
24AA02/24LC02B
1.0 ELECTRICAL CHARACTERISTICS
Absolute Maximum Ratings (†)
VCC.............................................................................................................................................................................6.5V
All inputs and outputs w.r.t. VSS ......................................................................................................... -0.3V to VCC +1.0V
Storage temperature ...............................................................................................................................-65°C to +150°C
Ambient temperature with power applied ................................................................................................-40°C to +125°C
ESD protection on all pins ......................................................................................................................................................≥ 4 kV
† NOTICE: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to
the device. This is a stress rating only and functional operation of the device at those or any other conditions
above those indicated in the operational listings of this specification is not implied. Exposure to maximum rating
conditions for extended periods may affect device reliability.
TABLE 1-1: DC CHARACTERISTICS
DC CHARACTERISTICS
Industrial (I):
TA = -40°C to +85°C, VCC = +1.7V to +5.5V
Automotive (E): TA = -40°C to +125°C, VCC = +2.5V to +5.5V
Param.
No.
Sym.
Characteristic
Min. Typ. Max. Units
Conditions
D1 VIH
WP, SCL and SDA pins
D2 —
High-level input voltage 0.7 VCC
D3 VIL
Low-level input voltage
— 0.3 VCC
D4 VHYS Hysteresis of Schmitt 0.05 VCC
Trigger inputs
D5 VOL
Low-level output voltage
— 0.40
D6 ILI
Input leakage current
— ±1
D7 ILO
Output leakage current
±1
D8 CIN,
Pin capacitance
COUT (all inputs/outputs)
— — 10
D9 ICC write Operating current
— 0.1
3
D10 ICC read
— 0.05
1
D11 ICCS
Standby current
— 0.01
——
1
5
Note: This parameter is periodically sampled and not 100% tested.
——
V—
V—
V (Note)
V IOL = 3.0 mA, VCC = 2.5V
μA VIN = VSS or VCC
μA VOUT = VSS or VCC
pF VCC = 5.0V (Note)
TA = 25°C, FCLK = 1 MHz
mA VCC = 5.5V, SCL = 400 kHz
mA —
μΑ Industrial
μΑ Automotive
SDA = SCL = VCC
WP = VSS
DS21709J-page 2
© 2009 Microchip Technology Inc.









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24AA02 Даташит, Описание, Даташиты
24AA02/24LC02B
TABLE 1-2: AC CHARACTERISTICS
AC CHARACTERISTICS
Industrial (I):
TA = -40°C to +85°C, VCC = +1.7V to +5.5V
Automotive (E): TA = -40°C to +125°C,VCC = +2.5V to +5.5V
Param.
No.
Sym.
Characteristic
Min.
Typ. Max. Units
Conditions
1
FCLK
Clock frequency
— — 400 kHz 2.5V VCC 5.5V
— — 100
1.7V VCC < 2.5V (24AA02)
2 THIGH Clock high time
600 — — ns 2.5V VCC 5.5V
4000 — —
1.7V VCC < 2.5V (24AA02)
3 TLOW Clock low time
1300 — — ns 2.5V VCC 5.5V
4700 — —
1.7V VCC < 2.5V (24AA02)
4 TR
SDA and SCL rise time
(Note 1)
— 300 ns 2.5V VCC 5.5V (Note 1)
— 1000
1.7V VCC < 2.5V (24AA02)
(Note 1)
5 TF SDA and SCL fall time — — 300 ns (Note 1)
6
THD:STA Start condition hold time
600
— — ns 2.5V VCC 5.5V
4000 — —
1.7V VCC < 2.5V (24AA02)
7 TSU:STA Start condition setup
time
600 — — ns 2.5V VCC 5.5V
4700 — —
1.7V VCC < 2.5V (24AA02)
8 THD:DAT Data input hold time
0 — — ns (Note 2)
9 TSU:DAT Data input setup time
100 — — ns 2.5V VCC 5.5V
250 — —
1.7V VCC < 2.5V (24AA02)
10 TSU:STO Stop condition setup
time
600 — — ns 2.5V VCC 5.5V
4000 — —
1.7V VCC < 2.5V (24AA02)
11 TAA
Output valid from clock
(Note 2)
— 900 ns 2.5V VCC 5.5V
— 3500
1.7V VCC < 2.5V (24AA02)
12
TBUF
Bus free time: Time the
1300
— ns 2.5V VCC 5.5V
bus must be free before 4700 — —
1.7V VCC < 2.5V (24AA02)
a new transmission can
start
13 TOF
Output fall time from VIH 20+0.1CB — 250 ns 2.5V VCC 5.5V
minimum to VIL
— — 250
1.7V VCC < 2.5V (24AA02)
maximum
14 TSP
Input filter spike
suppression
(SDA and SCL pins)
— — 50 ns (Notes 1 and 3)
15 TWC Write cycle time (byte or —
page)
— 5 ms —
16 —
Endurance
1M — — cycles 25°C, (Note 4)
Note 1: Not 100% tested. CB = total capacitance of one bus line in pF.
2: As a transmitter, the device must provide an internal minimum delay time to bridge the undefined region
(minimum 300 ns) of the falling edge of SCL to avoid unintended generation of Start or Stop conditions.
3: The combined TSP and VHYS specifications are due to new Schmitt Trigger inputs which provide improved
noise spike suppression. This eliminates the need for a TI specification for standard operation.
4: This parameter is not tested but ensured by characterization. For endurance estimates in a specific
application, please consult the Total Endurance™ Model which can be obtained from Microchip’s web site
at www.microchip.com.
© 2009 Microchip Technology Inc.
DS21709J-page 3










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