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PDF STP25N80K5 Data sheet ( Hoja de datos )

Número de pieza STP25N80K5
Descripción N-channel Power MOSFET
Fabricantes STMicroelectronics 
Logotipo STMicroelectronics Logotipo



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No Preview Available ! STP25N80K5 Hoja de datos, Descripción, Manual

STB25N80K5, STF25N80K5,
STP25N80K5, STW25N80K5
N-channel 800 V, 0.19 Ω typ., 19.5 A MDmesh™ K5 Power MOSFETs
in D2PAK, TO-220FP, TO-220 and TO-247 packages
Datasheet production data
TAB
3
1
D2PAK
TAB
3
2
1
TO-220FP
3
2
1
TO-220
3
2
1
TO-247
Figure 1. Internal schematic diagram
' 7$%
Features
Order code
VDS @
TJmax
RDS(on)
max
ID
PTOT
STB25N80K5
250 W
STF25N80K5
STP25N80K5
STW25N80K5
800 V
< 0.260 19.5 A
40 W
250 W
Industry’s lowest RDS(on) x area
Industry’s best figure of merit (FoM
Ultra low gate charge
100% avalanche tested
Zener-protected
Applications
Switching applications
* 
6 
AM01476v1
Description
These very high voltage N-channel Power
MOSFETs are designed using MDmesh™ K5
technology based on an innovative proprietary
vertical structure. The result is a dramatic
reduction in on-resistance and ultra-low gate
charge for applications requiring superior power
density and high efficiency.
Order code
STB25N80K5
STF25N80K5
STP25N80K5
STW25N80K5
Table 1. Device summary
Marking
Package
D2PAK
25N80K5
TO-220FP
TO-220
TO-247
Packaging
Tape and reel
Tube
October 2014
This is information on a product in full production.
DocID023466 Rev 3
1/23
www.st.com
23

1 page




STP25N80K5 pdf
STB25N80K5, STF25N80K5, STP25N80K5, STW25N80K5
Electrical characteristics
Table 6. Switching times
Symbol
Parameter
Test conditions
Min. Typ. Max. Unit
td(on)
tr
td(off)
tf
Turn-on delay time
Rise time
Turn-off delay time
Fall time
- 25 - ns
VDD = 400 V, ID = 10 A,
RG=4.7 , VGS=10 V
-
13
-
ns
(see Figure 21)
- 60 - ns
- 15 - ns
Table 7. Source drain diode
Symbol
Parameter
Test conditions
Min. Typ. Max. Unit
ISD Source-drain current
- 19.5 A
ISDM
VSD(1)
Source-drain current (pulsed)
Forward on voltage
ISD= 19.5 A, VGS=0
-
-
78 A
1.5 V
trr
Qrr
IRRM
Reverse recovery time
Reverse recovery charge
Reverse recovery current
ISD= 19.5 A, VDD= 60 V - 515
di/dt = 100 A/µs,
- 11
(see Figure 20)
- 43.2
ns
μC
A
trr
Qrr
IRRM
Reverse recovery time
Reverse recovery charge
Reverse recovery current
ISD= 19.5 A,VDD= 60 V
di/dt=100 A/µs,
Tj=150 °C
(see Figure 20)
- 615
- 13
- 43
ns
μC
A
1. Pulsed: pulse duration = 300µs, duty cycle 1.5%
Table 8. Gate-source Zener diode
Symbol
Parameter
Test conditions
V(BR)GSO
Gate-source breakdown
voltage
IGS= ± 1 mA, ID=0
Min. Typ. Max. Unit
30 -
-V
The built-in back-to-back Zener diodes have been specifically designed to enhance the ESD
capability of the device. The Zener voltage is appropriate for efficient and cost-effective
intervention to protect the device integrity. These integrated Zener diodes thus eliminate the
need for external components.
DocID023466 Rev 3
5/23

5 Page





STP25N80K5 arduino
STB25N80K5, STF25N80K5, STP25N80K5, STW25N80K5
Package mechanical data
4.1 STB25N80K5, D2PAK
Figure 24. D²PAK (TO-263) drawing
0079457_U
DocID023466 Rev 3
11/23

11 Page







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