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PDF SA630 Data sheet ( Hoja de datos )
| Número de pieza | SA630 | |
| Descripción | Single-Pole Double-Throw (SPDT) switch | |
| Fabricantes | NXP Semiconductors | |
| Logotipo |  |
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SA630
Single-Pole Double-Throw (SPDT) switch
Rev. 3 — 23 July 2014
Product data sheet
1. General description
The SA630 is a wideband RF switch fabricated in BiCMOS technology and incorporating
on-chip CMOS/TTL compatible drivers. Its primary function is to switch signals in the
frequency range DC to 1 GHz from one 50 channel to another. The switch is activated
by a CMOS/TTL compatible signal applied to the enable channel 1 pin (ENCH1).
The extremely low current consumption makes the SA630 ideal for portable applications.
The excellent isolation and low loss makes this device a suitable replacement for PIN
diodes.
The SA630 is available in an 8-pin SO (surface-mounted miniature) package.
2. Features and benefits
Wideband (DC to 1 GHz)
Low through loss (1 dB typical at 200 MHz)
Unused input is terminated internally in 50
Excellent overload capability (1 dB gain compression point +18 dBm at 300 MHz)
Low DC power (170 A from 5 V supply)
Fast switching (20 ns typical)
Good isolation (off channel isolation 60 dB at 100 MHz)
Low distortion (IP3 intercept +33 dBm)
Good 50 match (return loss 18 dB at 400 MHz)
Full ESD protection
Bidirectional operation
3. Applications
Digital transceiver front-end switch
Antenna switch
Filter selection
Video switch
FSK transmitter
1 page  
NXP Semiconductors
SA630
Single-Pole Double-Throw (SPDT) switch
11. Static characteristics
Table 7. Static characteristics
VDD = +5 V; Tamb = 25 C; unless otherwise specified.
Symbol Parameter
Conditions
IDD supply current
Vth threshold voltage
VIH HIGH-level input voltage
TTL/CMOS logic
logic 1 level;
enable channel 1
VIL LOW-level input voltage
logic 0 level;
enable channel 2
IIL(ENCH1) LOW-level input current on pin ENCH1 ENCH1 = 0.4 V
IIH(ENCH1) HIGH-level input current on pin ENCH1 ENCH1 = 2.4 V
Min
40
[1] 1.1
2.0
0.3
1
1
[1] The ENCH1 input must be connected to a valid logic level for proper operation of the SA630.
Typ
170
1.25
-
-
0
0
Max
300
1.4
VDD
+0.8
+1
+1
Unit
A
V
V
V
A
A
12. Dynamic characteristics
Table 8. Dynamic characteristics
All measurements include the effects of the SA630 evaluation board (Figure 19). Measurement system impedance is 50 .
Symbol Parameter
Conditions
Min Typ Max Unit
s21, s12 insertion loss (ON channel)
DC to 100 MHz
500 MHz
- 1 - dB
- 1.4 - dB
900 MHz
- 2 2.8 dB
s21, s12
isolation (OFF channel)[1]
10 MHz
100 MHz
70 80 -
- 60 -
dB
dB
500 MHz
- 50 - dB
900 MHz
24 30 -
dB
s11, s22 return loss (ON channel)
DC to 400 MHz
900 MHz
- 20 - dB
- 12 - dB
s11, s22 return loss (OFF channel)
DC to 400 MHz
900 MHz
- 17 - dB
- 13 - dB
td(off)
turn-off delay time
50 % TTL to
(90 % to 10 %) RF
- 20 - ns
tf(off)
tr(on)
Vtrt(p-p)
PL(1dB)
IP3
turn-off fall time
turn-on rise time
peak-to-peak transient voltage
output power at 1 dB gain compression
third-order intercept point
90 % to 10 % RF
10 % to 90 % RF
switching transients
DC to 1 GHz
100 MHz
- 5 - ns
- 5 - ns
- 165 - mV
- +18 - dBm
- +33 - dBm
IP2 second-order intercept point
100 MHz
- +52 - dBm
NF noise figure
Zo = 50
100 MHz
- 1.0 - dB
900 MHz
- 2.0 - dB
[1] The placement of the AC bypass capacitor is critical to achieve these specifications. See Section 14 for more details.
SA630
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 23 July 2014
© NXP Semiconductors N.V. 2014. All rights reserved.
5 of 20
5 Page 
NXP Semiconductors
SA630
Single-Pole Double-Throw (SPDT) switch
IN/OUT
SA630
Fig 23. Cascaded configuration
enable
OUT1/IN1
SA630
SA630
OUT2/IN2
aaa-014012
SA630
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 23 July 2014
© NXP Semiconductors N.V. 2014. All rights reserved.
11 of 20
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| Páginas | Total 20 Páginas | |
| PDF Descargar | [ Datasheet SA630.PDF ] | |
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