PDF AP22966 Data sheet ( Hoja de datos )

Número de pieza	AP22966
Descripción	5V DUAL CHANNEL PROGRAMMABLE LOAD SWITCH
Fabricantes	Diodes
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No Preview Available ! AP22966 5V DUAL CHANNEL PROGRAMMABLE LOAD0S1W0ITCH Description AP22966 is an integrated dual N-channel load switch which features an adjustable slew rate that can be set using an external capacitor independently for each channel. The N-Channel MOSFETs have a typical RON of 18mΩ, enabling current handling capability of up to 6A. Both channels can independently be controlled with low voltage logic signals. AP22966 is designed to operate from 0.8V to 5.5V. The low quiescent supply current makes it ideal for use in battery powered distribution systems where power consumption is a concern. AP22966 is available in a standard Green V-DFN3020-14 package with exposed PAD for improved thermal performance and is RoHS compliant. Pin Assignments Top View Bottom View VIN1 1 VIN1 2 14 VOUT1 14 13 VOUT1 13 1 VIN1 2 VIN1 EN1 3 12 SS1 12 3 EN1 VBIAS 4 EN2 5 11 GND 11 10 SS2 10 4 VBIAS 5 EN2 VIN2 6 9 VOUT2 9 6 VIN2 VIN2 7 8 VOUT2 8 7 VIN2 Features  Integrated Dual Channel Load Switch  0.8V to 5.5V Input Voltage Range  Low Typical RON of 18mΩ (VBIAS = 5V)  6A Maximum Continuous Current per Channel  Very Low Quiescent Current  60μA (Both Channels)  45μA (Single Channel)  Per Channel Adjustable Slew Rate  Internal Quick Output Discharge (QOD)  Low Voltage Logic Enable  1.2/1.8/2.5/3.3V Logic  Small Form Factor Package V-DFN3020-14 – footprint of just 6mm2  Thermally Efficient Low Profile Package  Totally Lead-Free & Fully RoHS Compliant (Notes 1 & 2)  Halogen and Antimony Free. “Green” Device (Note 3) V-DFN3020-14 Applications  Ultrabooks  Notebooks  Netbooks  SetTop Boxes  SSD (Solid State Drives)  Consumer Electronics  Tablet PC  Telecom Systems Notes: 1. No purposely added lead. Fully EU Directive 2002/95/EC (RoHS) & 2011/65/EU (RoHS 2) compliant. 2. See http://www.diodes.com/quality/lead_free.html for more information about Diodes Incorporated’s definitions of Halogen- and Antimony-free, "Green" and Lead-free. 3. Halogen- and Antimony-free "Green” products are defined as those which contain <900ppm bromine, <900ppm chlorine (<1500ppm total Br + Cl) and <1000ppm antimony compounds. Typical Applications Circuit VIN 1 CIN1 VBIAS ON VIN 2 OFF CIN2 VIN1 VBIAS VOUT1 SS1 EN1 VIN2 AP22966 VOUT2 SS2 ON OFF EN2 GND CSS1 CL1 RL1 CSS2 CL2 RL2 AP22966 Document number: DS36217 Rev. 2 - 2 1 of 14 www.diodes.com November 2014 © Diodes Incorporated 1 page Test Circuit and tON/tOFF Waveforms VEN VOUT 50% tON tD 50% 50% tOFF 50% VOUT 90% 10% tRISE AP22966 010 90% 10% tFALL Switching Characteristics Symbol Parameters Conditions VIN = VEN = VBIAS = 5V, TA = +25°C tRISE Output Rise-time RL = 10, CSS = 1000pF, CL = 0.1µF tON Output Turn-ON Delay Time RL = 10, CSS = 1000pF, CL = 0.1µF tFALL Output Fall-time RL = 10, CSS = 1000pF, CL = 0.1µF tOFF Output Turn-OFF Delay Time RL = 10, CSS = 1000pF, CL = 0.1µF tD Output Start Delay RL = 10, CSS = 1000pF, CL = 0.1µF VIN = 0.8V, VEN = VBIAS = 5V, TA = +25°C tRISE Output Rise-time RL = 10, CSS = 1000pF, CL = 0.1µF tON Output Turn-ON Delay Time RL = 10, CSS = 1000pF, CL = 0.1µF tFALL Output Fall-time RL = 10, CSS = 1000pF, CL = 0.1µF tOFF Output Turn-OFF Delay Time RL = 10, CSS = 1000pF, CL = 0.1µF tD Output Start Delay RL = 10, CSS = 1000pF, CL = 0.1µF VIN = 2.5V, VEN = 5V, VBIAS = 2.5V, TA = +25°C tRISE Output Rise-time RL = 10, CSS = 1000pF, CL = 0.1µF tON Output Turn-ON Delay Time RL = 10, CSS = 1000pF, CL = 0.1µF tFALL Output Fall-time RL = 10, CSS = 1000pF, CL = 0.1µF tOFF Output Turn-OFF Delay Time RL = 10, CSS = 1000pF, CL = 0.1µF tD Output Start Delay RL = 10, CSS = 1000pF, CL = 0.1µF VIN = 0.8V, VEN = 5V, VBIAS = 2.5V, TA = +25°C tRISE Output Rise-time RL = 10, CSS = 1000pF, CL = 0.1µF tON Output Turn-ON Delay Time RL = 10, CSS = 1000pF, CL = 0.1µF tFALL Output Fall-time RL = 10, CSS = 1000pF, CL = 0.1µF tOFF Output Turn-OFF Delay Time RL = 10, CSS = 1000pF, CL = 0.1µF tD Output Start Delay RL = 10, CSS = 1000pF, CL = 0.1µF AP22966 Document number: DS36217 Rev. 2 - 2 5 of 14 www.diodes.com Min Typ Max Unit – 1720 – – 1270 – – 2.3 – – 9.6 – – 160 – µs µs µs µs µs – 330 – – 428 – – 11 – – 146 – – 253 – µs µs µs µs µs – 1488 – – 1381 – –3– – 11 – – 359 – µs µs µs µs µs – 561 – – 748 – – 11 – – 123 – – 415 – µs µs µs µs µs November 2014 © Diodes Incorporated 5 Page Application Information AP22966 010 Enable/Disable CONTROL The EN pins control the state of the two switches. AP22966 is enabled when the EN pins are asserted high, and, the device is disabled when EN pins are asserted low. The EN input is compatible with both TTL and CMOS logic. This pin cannot be left floating and must be tied either high or low for proper functionality. INPUT CAPACITOR To limit the voltage drop on the input supply when the switch turns on into a discharged load capacitor resulting in a transient inrush current, a capacitor needs to be placed between VIN and GND. Use 1μF capacitor or a larger value for high-current applications. Place the capacitor close to the VIN pins. OUTPUT CAPACITOR The recommended output capacitor value is 0.1μF when switching lighter loads. For heavier loads close to 6A, it is recommended that the VIN and VOUT trace lengths be kept to a minimum. In addition, a bulk capacitor (≥ 10μF) may also be placed close to the VOUT pins. If using a bulk capacitor on VOUT, it is important to control the inrush current by choosing an appropriate soft-start time in order to minimize the droop on the input supply. SOFT-START TIME A capacitor on the SS pins (to GND) sets the slew rate for each channel. To ensure desired performance, a capacitor with a minimum voltage rating of 25V should be placed on the SS pins. The input inrush current can be controlled by choosing an appropriate soft-start time. The table below shows the rise-time (10% to 90%) on VOUT for a variety of VIN and CSS conditions. CSS(pF) 0 220 470 1000 2200 4700 10000 Soft-start Time (µs) 10% - 90%, VBIAS = 5V, CL = 0.1µF, CIN = 1µF, RL = 10Ω, Typical Values are at TA=+25°C 5V 3.3V 1.8V 1.5V 1.2V 1.05V 0.8V 129 93 67 61 59 57 47 452 310 177 148 125 112 96 898 610 351 290 241 210 166 1609 1130 661 557 454 397 315 3453 2371 1483 1224 1019 870 710 7202 4978 2900 2394 2014 1728 1430 13673 9774 5728 4778 3982 3370 2762 THERMAL CONSIDERATOIN The maximum junction temperature should be restricted to +125°C under normal operating conditions. The maximum allowable power dissipation PD(MAX) can be calculated as: where, PD(MAX) = (TJ(MAX) - TA) / θJA TJ(MAX) is the maximum operating junction temperature. For AP22966, TJ(MAX) = 125°C TA is the ambient temperature of the device θJA is the junction-to-air thermal impedance BOARD LAYOUT Good PCB layout is important for improving the thermal performance of the device. All trace lengths should be kept as short as possible. Place input and output capacitors close to the device to minimize the effects of parasitic inductance. The input and output PCB traces should be as wide as possible. Use a ground plane to enhance the power dissipation capability of the device. AP22966 Document number: DS36217 Rev. 2 - 2 11 of 14 www.diodes.com November 2014 © Diodes Incorporated 11 Page

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