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PDF STM32F429BG Data sheet ( Hoja de datos )

Número de pieza STM32F429BG
Descripción ARM Cortex-M4 32b MCU + FPU
Fabricantes STMicroelectronics　
Logotipo STMicroelectronics Logotipo



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No Preview Available ! STM32F429BG Hoja de datos, Descripción, Manual

STM32F427xx
STM32F429xx
ARM Cortex-M4 32b MCU+FPU, 225DMIPS, up to 2MB Flash/256+4KB RAM, USB
OTG HS/FS, Ethernet, 17 TIMs, 3 ADCs, 20 comm. interfaces, camera & LCD-TFT
Datasheet - production data
Features
• Core: ARM® 32-bit Cortex®-M4 CPU with FPU,
Adaptive real-time accelerator (ART
Accelerator™) allowing 0-wait state execution
from Flash memory, frequency up to 180 MHz,
MPU, 225 DMIPS/1.25 DMIPS/MHz
(Dhrystone 2.1), and DSP instructions
• Memories
– Up to 2 MB of Flash memory organized into
two banks allowing read-while-write
– Up to 256+4 KB of SRAM including 64-KB
of CCM (core coupled memory) data RAM
– Flexible external memory controller with up
to 32-bit data bus:
SRAM,PSRAM,SDRAM/LPSDR SDRAM ,
Compact Flash/NOR/NAND memories
• LCD parallel interface, 8080/6800 modes
• LCD-TFT controller up to XGA resolution with
dedicated Chrom-ART Accelerator™ for
enhanced graphic content creation (DMA2D)
• Clock, reset and supply management
– 1.7 V to 3.6 V application supply and I/Os
– POR, PDR, PVD and BOR
– 4-to-26 MHz crystal oscillator
– Internal 16 MHz factory-trimmed RC (1%
accuracy)
– 32 kHz oscillator for RTC with calibration
– Internal 32 kHz RC with calibration
• Low power
– Sleep, Stop and Standby modes
–
rVeBgAisTtseurspp+lyopfotiroRnaTlC4,
20×32 bit backup
KB backup SRAM
• 3×12-bit, 2.4 MSPS ADC: up to 24 channels
and 7.2 MSPS in triple interleaved mode
• 2×12-bit D/A converters
• General-purpose DMA: 16-stream DMA
controller with FIFOs and burst support
• Up to 17 timers: up to twelve 16-bit and two 32-
bit timers up to 180 MHz, each with up to 4
IC/OC/PWM or pulse counter and quadrature
(incremental) encoder input
• Debug mode
– SWD & JTAG interfaces
– Cortex-M4 Trace Macrocell™
&"'!
LQFP100 (14 × 14 mm) UFBGA176 (10 x 10 mm)
LQFP144 (20 × 20 mm)
LQFP176 (24 × 24 mm)
UFBGA169 (7 × 7 mm)
TFBGA216 (13 x 13 mm)
LQFP208 (28 x 28 mm)
WLCSP143
• Up to 168 I/O ports with interrupt capability
– Up to 164 fast I/Os up to 90 MHz
– Up to 166 5 V-tolerant I/Os
• Up to 21 communication interfaces
– Up to 3 × I2C interfaces (SMBus/PMBus)
– Up to 4 USARTs/4 UARTs (11.25 Mbit/s,
ISO7816 interface, LIN, IrDA, modem
control)
– Ufupll-tdou6pleSxPII2sS(4fo5rMabuidtsio/sc),la2sswiathccmuruaxceydvia
internal audio PLL or external clock
– 1 x SAI (serial audio interface)
– 2 × CAN (2.0B Active) and SDIO interface
• Advanced connectivity
– USB 2.0 full-speed device/host/OTG
controller with on-chip PHY
– USB 2.0 high-speed/full-speed
device/host/OTG controller with dedicated
DMA, on-chip full-speed PHY and ULPI
– 10/100 Ethernet MAC with dedicated DMA:
supports IEEE 1588v2 hardware, MII/RMII
• 8- to 14-bit parallel camera interface up to
54 Mbytes/s
• True random number generator
• CRC calculation unit
• RTC: subsecond accuracy, hardware calendar
• 96-bit unique ID
July 2016
This is information on a product in full production.
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STM32F429BG pdf
STM32F427xx STM32F429xx
Contents
6.1.2 Typical values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90
6.1.3 Typical curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90
6.1.4 Loading capacitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90
6.1.5 Pin input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90
6.1.6 Power supply scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 91
6.1.7 Current consumption measurement . . . . . . . . . . . . . . . . . . . . . . . . . . . 92
6.2 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92
6.3 Operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94
6.3.1 General operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94
6.3.2 VCAP1/VCAP2 external capacitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96
6.3.3 Operating conditions at power-up / power-down (regulator ON) . . . . . . 97
6.3.4 Operating conditions at power-up / power-down (regulator OFF) . . . . . 97
6.3.5 Reset and power control block characteristics . . . . . . . . . . . . . . . . . . . 98
6.3.6 Over-drive switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . 99
6.3.7 Supply current characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100
6.3.8 Wakeup time from low-power modes . . . . . . . . . . . . . . . . . . . . . . . . . . 116
6.3.9 External clock source characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 117
6.3.10 Internal clock source characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 121
6.3.11 PLL characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 123
6.3.12 PLL spread spectrum clock generation (SSCG) characteristics . . . . . 126
6.3.13 Memory characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128
6.3.14 EMC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 130
6.3.15 Absolute maximum ratings (electrical sensitivity) . . . . . . . . . . . . . . . . 132
6.3.16 I/O current injection characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . 133
6.3.17 I/O port characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 134
6.3.18 NRST pin characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 140
6.3.19 TIM timer characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 141
6.3.20 Communications interfaces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 141
6.3.21 12-bit ADC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 156
6.3.22 Temperature sensor characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . 162
6.3.23 VBAT monitoring characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 163
6.3.24 Reference voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 163
6.3.25 DAC electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 164
6.3.26 FMC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 167
6.3.27 Camera interface (DCMI) timing specifications . . . . . . . . . . . . . . . . . . 192
6.3.28 LCD-TFT controller (LTDC) characteristics . . . . . . . . . . . . . . . . . . . . . 192
6.3.29 SD/SDIO MMC card host interface (SDIO) characteristics . . . . . . . . . 195
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STM32F429BG arduino
STM32F427xx STM32F429xx
List of figures
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Figure 89.
SAI slave timing waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 148
USB OTG full speed timings: definition of data signal rise and fall time . . . . . . . . . . . . . . 150
ULPI timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 151
Ethernet SMI timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 153
Ethernet RMII timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 154
Ethernet MII timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 155
ADC accuracy characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 159
Typical connection diagram using the ADC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 160
Power supply and reference decoupling (VREF+ not connected to VDDA). . . . . . . . . . . . . 161
Power supply and reference decoupling (VREF+ connected to VDDA). . . . . . . . . . . . . . . . 162
12-bit buffered /non-buffered DAC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 166
Asynchronous non-multiplexed SRAM/PSRAM/NOR read waveforms . . . . . . . . . . . . . . 168
Asynchronous non-multiplexed SRAM/PSRAM/NOR write waveforms . . . . . . . . . . . . . . 170
Asynchronous multiplexed PSRAM/NOR read waveforms. . . . . . . . . . . . . . . . . . . . . . . . 171
Asynchronous multiplexed PSRAM/NOR write waveforms . . . . . . . . . . . . . . . . . . . . . . . 173
Synchronous multiplexed NOR/PSRAM read timings . . . . . . . . . . . . . . . . . . . . . . . . . . . 175
Synchronous multiplexed PSRAM write timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 176
Synchronous non-multiplexed NOR/PSRAM read timings . . . . . . . . . . . . . . . . . . . . . . . . 178
Synchronous non-multiplexed PSRAM write timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . 179
PC Card/CompactFlash controller waveforms for common memory read access . . . . . . 181
PC Card/CompactFlash controller waveforms for common memory write access . . . . . . 181
PC Card/CompactFlash controller waveforms for attribute memory
read access . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 182
PC Card/CompactFlash controller waveforms for attribute memory
write access . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 183
PC Card/CompactFlash controller waveforms for I/O space read access . . . . . . . . . . . . 183
PC Card/CompactFlash controller waveforms for I/O space write access . . . . . . . . . . . . 184
NAND controller waveforms for read access . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 186
NAND controller waveforms for write access . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 186
NAND controller waveforms for common memory read access . . . . . . . . . . . . . . . . . . . . 187
NAND controller waveforms for common memory write access. . . . . . . . . . . . . . . . . . . . 187
SDRAM read access waveforms (CL = 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 188
SDRAM write access waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 190
DCMI timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 192
LCD-TFT horizontal timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 194
LCD-TFT vertical timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 194
SDIO high-speed mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 195
SD default mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 195
LQFP100 -100-pin, 14 x 14 mm low-profile quad flat package outline . . . . . . . . . . . . . . . 197
LQPF100 - 100-pin, 14 x 14 mm low-profile quad flat
recommended footprint . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 199
LQFP100 marking example (package top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 200
WLCSP143 - 143-ball, 4.521x 5.547 mm, 0.4 mm pitch wafer level chip scale
package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 201
WLCSP143 - 143-ball, 4.521x 5.547 mm, 0.4 mm pitch wafer level chip scale
recommended footprint . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 202
WLCSP143 marking example (package top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 203
LQFP144-144-pin, 20 x 20 mm low-profile quad flat package outline . . . . . . . . . . . . . . . 204
LQPF144- 144-pin,20 x 20 mm low-profile quad flat package
recommended footprint . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 206
LQFP144 marking example (package top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 207
LQFP176 - 176-pin, 24 x 24 mm low-profile quad flat package outline . . . . . . . . . . . . . . 208
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