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EN29F040A PDF даташит

Спецификация EN29F040A изготовлена ​​​​«EON» и имеет функцию, называемую «4 Megabit (512K x 8-bit) Flash Memory».

Детали детали

Номер произв EN29F040A
Описание 4 Megabit (512K x 8-bit) Flash Memory
Производители EON
логотип EON логотип 

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EN29F040A Даташит, Описание, Даташиты
EN29F040A
4 Megabit (512K x 8-bit) Flash Memory
EN29F040A
FEATURES
5.0V operation for read/write/erase
operations
Fast Read Access Time
- 45ns, 55ns, 70ns, and 90ns
Sector Architecture:
- 8 uniform sectors of 64Kbytes each
- Supports full chip erase
- Individual sector erase supported
- Sector protection:
Hardware locking of sectors to prevent
program or erase operations within
individual sectors
High performance program/erase speed
- Byte program time: 10µs typical
- Sector erase time: 500ms typical
- Chip erase time: 3.5s typical
Low Standby Current
- 1µA CMOS standby current-typical
- 1mA TTL standby current
Low Power Active Current
- 30mA active read current
- 30mA program/erase current
JEDEC Standard program and erase
commands
JEDEC standard DATA polling and toggle
bits feature
Single Sector and Chip Erase
Sector Unprotect Mode
Embedded Erase and Program Algorithms
Erase Suspend / Resume modes:
Read and program another Sector during
Erase Suspend Mode
0.23 µm triple-metal double-poly
triple-well CMOS Flash Technology
Low Vcc write inhibit < 3.2V
100K endurance cycle
Package Options
- 32-pin PDIP
- 32-pin PLCC
- 32-pin TSOP (Type 1)
Commercial and Industrial Temperature
Ranges
GENERAL DESCRIPTION
The EN29F040A is a 4-Megabit, electrically erasable, read/write non-volatile flash memory.
Organized into 512K words with 8 bits per word, the 4M of memory is arranged in eight uniform
sectors of 64Kbytes each. Any byte can be programmed typically in 10µs. The EN29F040A
features 5.0V voltage read and write operation, with access times as fast as 45ns to eliminate the
need for WAIT states in high-performance microprocessor systems.
The EN29F040A has separate Output Enable ( OE ), Chip Enable ( CE ), and Write Enable ( W E )
controls, which eliminate bus contention issues. This device is designed to allow either single (or
multiple) Sector or full chip erase operation, where each Sector can be individually protected against
program/erase operations or temporarily unprotected to erase or program. The device can sustain a
minimum of 100K program/erase cycles on each Sector.
This Data Sheet may be revised by subsequent versions 1
or modifications due to changes in technical specifications.
©2003 Eon Silicon Solution, Inc., www.essi.com.tw
Rev. B, Issue Date: 2004/04/01









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EN29F040A Даташит, Описание, Даташиты
TABLE 1. PIN DESCRIPTION
Pin Name
A0-A18
DQ0-DQ7
CE
OE
WE
Vcc
Vss
Function
Addresses
Data Inputs/Outputs
Chip Enable
Output Enable
Write Enable
Supply Voltage
(5V ± 10% )
Ground
EN29F040A
FIGURE 1. LOGIC DIAGRAM
Vcc
18
A0 - A18
CE
OE
WE
EN29F040A
8
DQ0 - DQ7
Vss
TABLE 2. SECTOR ARCHITECTURE
Sector
ADDRESSES
SIZE (Kbytes)
A18
A17
A16
7 70000h - 7FFFFh 64 1 1 1
6 60000h - 6FFFFh 64 1 1 0
5 50000h – 5FFFFh
64
101
4 40000h – 4FFFFh
64
100
3 30000h – 3FFFFh
64
011
2 20000h - 2FFFFh 64 0 1 0
1 10000h - 1FFFFh 64 0 0 1
0 00000h - 0FFFFh 64 0 0 0
This Data Sheet may be revised by subsequent versions
2
or modifications due to changes in technical specifications.
©2003 Eon Silicon Solution, Inc., www.essi.com.tw
Rev. B, Issue Date: 2004/04/01









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EN29F040A Даташит, Описание, Даташиты
BLOCK DIAGRAM
EN29F040A
Vcc
Vss
State
Control
WE
Command
Register
CE
OE
Vcc Detector
A0-A18
Block Protect Switches
Erase Voltage Generator
DQ0-DQ7
Input/Output Buffers
Program Voltage
Generator
Chip Enable
Output Enable
Logic
STB
Data Latch
Timer
Y-Decoder
STB
X-Decoder
Y-Gating
Cell Matrix
This Data Sheet may be revised by subsequent versions
3
or modifications due to changes in technical specifications.
©2003 Eon Silicon Solution, Inc., www.essi.com.tw
Rev. B, Issue Date: 2004/04/01










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