PDF AIC1841 Data sheet ( Hoja de datos )

Número de pieza	AIC1841
Descripción	REGULATED GaAsFET BIAS
Fabricantes	Analog Intergrations Corporation
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No Preview Available ! PRELIMINARY AIC1840/1841 LOW-NOISE, REGULATED GaAsFET BIAS SPEC NO: DS-1840-P2 ! FEATURES " Low Output Noise: 2mV Ripple. " Work with Small Capacitors (as Low as 0.22µF). " Fixed -2V or Adjustable Output. " 2.5V to 6.5V Input Voltage Range. " Switching Frequency: 104KHz in Normal Operation. " 1µA Maximum in Shutdown Mode. ! APPLICATIONS " Cellular Phones. " GaAsFET Power Amplifier Modules. " Personal Communicators and PDAs. " Wireless Data Loggers. " LCD Bias Contrast Control. " Regulated Negative Power Supplies. ! DESCRIPTION The AIC1840/1841 is a switched-capacitor volt- age inverter that generates a regulated fixed -2.0V or externally adjustable output. An internal linear post-regulator reduces the output voltage ripple to less than 2mV, making the AIC1840/1841 excellent for use as bias voltage generator for transmitter GaAsFETs in portable RF and cellular telephone applications. The op- eration voltage is as low as 2.5V. The AIC1840/1841 offers a -2V preset output as well as a -1.3V to -3.0V adjustable output. Input voltage range for AIC1840/1841 is 2.5V to 6.5V. Output current is 5mA at VOUT= -2V and with VIN≥2.5V. Quiescent current is 510µA at VIN=3.6V and reduces to less than 1µA in shutdown mode (3µA max. for the AIC1841). ! TYPICAL APPLICATION CIRCUIT The AIC1840 has an active-low shutdown input, while the AIC1841 has an active-high shutdown input. VBAT (+2.5 ~ +6.5V) VTX C3 3.3µF + C8 L1 C9 RF INPUT 8 RF POWER AMPLIFIER L2 T1 C1 3.3µF + 1 2 VDD CAPP VOUT 6 VOUT(VGS)= -2.0V CAPN C4 3 AIC1841 3.3µF + C5 C2 3.3µF VNN 5 4 FB SHDN GND + 7 VSHDN R1 C6 C7 T2 C11 C10 RF OUTPUT Bias Generator for GaAsFET Power Amplifier ! ORDERING INFORMATION AIC1840 XX AIC1841 XX PACKAGE TYPE N: PLASTIC DIP S: SMALL OUTLINE TEMPERATURE RANGE C: 0°C~+70°C ORDER NUMBER AIC1840CN AIC1841CN (PLASTIC DIP) AIC1840CS AIC1841CS (PLASTIC SO) PIN CONFIGURATION TOP VIEW CAPP 1 CAPN 2 VNN 3 SHDN 4 (AIC1840) *SHDN (AIC1841) 8 VDD 7 GND 6 VOUT 5 FB ANALOG INTEGRATIONS CORPORATION www.analog.com.tw 4F, 9 Industry E. 9th Road, Science-based Industrial Park , Hsinchu, Taiwan, R.O.C. TEL: (8863)577-2500 FAX:(8863)577-2510 1 1 page ! PIN DESCRIPTIONS PIN 1: CAPP - Positive terminal for C1. PIN 2: CAPN - Negative terminal for C1. PIN 3: VNN - Unregulated negative output volt- age. PIN 4: SHDN - Active-low TTL logic level shut- down input. (AIC1840) SHDN - Active-high TTL logic level shut- down input. (AIC1841) AIC1840/1841 LOW-NOISE, REGULATED GaAsFET BIAS SPEC NO: DS-1840-P2 PIN 5: FB - When FB is grounded, the output is preset to -2.0V. To select other output voltage, connect FB to ex- ternal resistor divider. PIN 6: VOUT - Negative regulated output voltage. PIN 7: GND - Ground. PIN 8: VDD - Input supply. ! APPLICATION INFORMATION SETTING THE OUTPUT VOLTAGE The AIC1840/AIC1841 can select either a fixed or an adjustable output voltage. Connect FB directly to GND to select the fixed -2.0V output (Fig.1), and connect FB to the midpoint of a resistor voltage di- vider from VOUT to GND (Fig. 2) to select an ad- justable output voltage. VIN must be 0.5V above the absolute value of VOUT to allow proper regulation. The output voltage is calculated from the formula below. Choose R2 to be between 10KΩ to 150KΩ. The adjustment range is from –1.3V to -3.0V. VOUT = (-1.15) × (1+ R2 ) R1 CAPACITORS Use capacitors with low effective series resistance (ESR) to maintain a low dropout voltage ( VIN - VOUT ). The overall dropout voltage is a func- tion of the charge pump‘s output resistance and the voltage drop across the linear regulator (N-channel pass transistor). At the 104KHz switching frequency, the charge-pump output resistance is a function of C1 and C2’s ESR. Therefor, minimizing the ESR of the charge-pump capacitors minimizes the dropout voltage. LAYOUT AND GROUNDING Good layout is important, primarily for good noise performance. 1. Mount all components as close together as possible. 2. Keep traces short to minimize parasitic induc- tance and capacitance. This includes connec- tions to FB. 3. Use a ground plane. NOISE AND RIPPLE MEASUREMENT Accurately measuring the output noise and ripple is a challenge. Brief differences in ground potential between the AIC1840/1841 circuit and the oscillo- scope (which result from the charge pump‘s switching action) cause ground currents in the probe’s wires, inducing sharp voltage spikes. For best results, measure directly across the output ca- pacitor (C4). Do not use the ground lead of the os- cilloscope probe; instead, remove the probe‘s tip cover and touch the ground ring on the probe di- rectly to C4’s ground terminal. You can also use a Tektronix chassis-mount test jack (part no. 131- 0258) to connect your scope probe directly. This di- rect connection gives the most accurate noise and ripple measurement. ANALOG INTEGRATIONS CORPORATION www.analog.com.tw 4F, 9 Industry E. 9th Road, Science-based Industrial Park , Hsinchu, Taiwan, R.O.C. TEL: (8863)577-2500 FAX:(8863)577-2510 5 5 Page

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