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PDF AOZ1092D Data sheet ( Hoja de datos )
| Número de pieza | AOZ1092D | |
| Descripción | 3A Simple Buck Regulator | |
| Fabricantes | Alpha & Omega Semiconductors | |
| Logotipo |  |
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AOZ1092D
EZBuck™ 3A Simple Buck Regulator
General Description
The AOZ1092D is a high efficiency, simple to use, 3A
buck regulator. The AOZ1092D works from a 4.5V to 16V
input voltage range, and provides up to 3A of
continuous output current with an output voltage
adjustable down to 0.8V.
The AOZ1092D comes in 4x5 DFN-8 packages and is
rated over a -40°C to +85°C ambient temperature range.
Features
● 4.5V to 16V operating input voltage range
● 50mΩ internal PFET switch for high efficiency:
up to 95%
● Schottky diode is included
● Internal soft start
● Output voltage adjustable to 0.8V
● 3A continuous output current
● Fixed 500kHz PWM operation
● Cycle-by-cycle current limit
● Short-circuit protection
● Output over voltage protection
● Thermal shutdown
● Small size 4x5 DFN-8 packages
Applications
● Point of load DC/DC conversion
● PCIe graphics cards
● Set top boxes
● DVD drives and HDD
● LCD panels
● Cable modems
● Telecom/networking/datacom equipment
Typical Application
VIN
C1
22µF
Ceramic
VIN
EN U1 LX
AOZ1092D
COMP
FB
RC C5
AGND
GND
CC
L1
4.7µH
VOUT
3.3V
R1
C2, C3
22µF
Ceramic
R2
Rev. 1.3 February 2009
Figure 1. 3.3V/3A Non-Synchronous Buck Regulator
www.aosmd.com
Page 1 of 16
1 page  
AOZ1092D
Typical Performance Characteristics
Circuit of Figure 1. TA = 25°C, VIN = VEN = 12V, VOUT = 3.3V unless otherwise specified.
Light Load (DCM) Operation
Full Load (CCM) Operation
Vin ripple
50mV/div
Vo ripple
50mV/div
IL
2A/div
VLX
10V/div
1μs/div
1μs/div
Startup to Full Load
Vin
5V/div
Full Load to Turn Off
400μs/div
50% to 100% Load Transient
Vo
2V/div
lin
1A/div
1ms/div
No Load to Turn Off
Vin ripple
0.1V/div
Vo ripple
50mV/div
IL
2A/div
VLX
10V/div
Vin
5V/div
Vo
1V/div
lin
1A/div
100μs/div
Vo Ripple
0.1V/div
lo
2A/div
1s/div
Vin
5V/div
Vo
1V/div
lin
1A/div
Rev. 1.3 February 2009
www.aosmd.com
Page 5 of 16
5 Page 
AOZ1092D
where;
where fC is desired crossover frequency,
VFB is 0.8V,
GEA is the error amplifier transconductance, which is 200 x 10-6 A/V, and
GCS is the current sense circuit transconductance, which is 6.86 A/V
The compensation capacitor CC and resistor RC together
make a zero. This zero is put somewhere close to the
dominate pole fp1 but lower than 1/5 of selected cross-
over frequency. CC can is selected by:
CC
=
--------------1---.--5---------------
2π × RC × fp1
The above equation can be simplified to:
CC
=
C-----O-----×-----R-----L-
R3
An easy-to-use application software which helps to
design and simulate the compensation loop can be found
at www.aosmd.com.
Thermal Management and Layout
Consideration
In the AOZ1092D buck regulator circuit, high pulsing
current flows through two circuit loops. The first loop
starts from the input capacitors, to the VIN pin, to the
LX pins, to the filter inductor, to the output capacitor and
load, and then return to the input capacitor through
ground. Current flows in the first loop when the high side
switch is on. The second loop starts from inductor, to the
output capacitors and load, to the anode of Schottky
diode, to the cathode of Schottky diode. Current flows in
the second loop when the low side diode is on.
In PCB layout, minimizing the two loops area reduces the
noise of this circuit and improves efficiency. A ground
plane is strongly recommended to connect input
capacitor, output capacitor, and PGND pin of the
AOZ1092D.
In the AOZ1092D buck regulator circuit, the major power
dissipating components are the AOZ1092D and output
inductor. The total power dissipation of converter circuit
can be measured by input power minus output power.
Ptotal_loss = VIN × IIN – VO × IO
The power dissipation of inductor can be approximately
calculated by output current and DCR of the inductor.
Pinductor_loss = IO2 × Rinductor × 1.1
The actual junction temperature can be calculated with
power dissipation in the AOZ1092D and thermal
impedance from junction to ambient.
Tjunction = (Ptotal_loss–Pinductor_loss) × ΘJA + Tamb
The maximum junction temperature of AOZ1092D is
150ºC, which limits the maximum load current capability.
Please see the thermal de-rating curves for maximum
load current of the AOZ1092D under different ambient
temperature.
The thermal performance of the AOZ1092D is strongly
affected by the PCB layout. Extra care should be taken
by users during design process to ensure that the IC will
operate under the recommended environmental
conditions.
Several layout tips are listed below for the best electric
and thermal performance. Figure 3 on the next page
illustrates a PCB layout example as reference.
1. Do not use thermal relief connection to the VIN
and the PGND pin. Pour a maximized copper area to
the PGND pin and the VIN pin to help thermal
dissipation.
2. Input capacitor should be connected to the VIN pin
and the PGND pin as close as possible.
3. A ground plane is preferred. If a ground plane is not
used, separate PGND from AGND and connect them
only at one point to avoid the PGND pin noise
coupling to the AGND pin.
4. Make the current trace from LX pins to L to Co to the
PGND as short as possible.
5. Pour copper plane on all unused board area and
connect it to stable DC nodes, like VIN, GND or VOUT.
6. The two LX pins are connected to internal PFET
drain. They are low resistance thermal conduction
path and most noisy switching node. Connected a
copper plane to LX pin to help thermal dissipation.
This copper plane should not be too larger otherwise
switching noise may be coupled to other part of
circuit.
7. Keep sensitive signal trace far away form the LX
pins.
Rev. 1.3 February 2009
www.aosmd.com
Page 11 of 16
11 Page | ||
| Páginas | Total 16 Páginas | |
| PDF Descargar | [ Datasheet AOZ1092D.PDF ] | |
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