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A4102 PDF даташит

Спецификация A4102 изготовлена ​​​​«AiT Semiconductor» и имеет функцию, называемую «LDO MODE OVP WITH INTEGRATED P-MOSFET».

Детали детали

Номер произв A4102
Описание LDO MODE OVP WITH INTEGRATED P-MOSFET
Производители AiT Semiconductor
логотип AiT Semiconductor логотип 

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A4102 Даташит, Описание, Даташиты
AiT Semiconductor Inc.
www.ait-ic.com
A4102
LDO MODE OVP WITH INTEGRATED P-MOSFET
BATTERY MANAGEMENT
DESCRIPTION
The A4102 is Li+ charger IC with integrated
P-MOSFET. The device is fabricated with
advanced CMOS technology to achieve
maintaining low static power dissipation over a very
broad VCC operating range.
The A4102 integrates a P-MOSFET and Schottky
diode which is normally a discrete device employed
for conventional battery charging design of mobile
phone system. In addition to that, A4102 works like
a LDO mode to keep CHRIN voltage stable when
ACIN goes high. And thus it will not trigger the
CHRIN pin over-voltage protection when ACIN
voltage increased to as high as 15V.
FEATURES
A Built-In P-MOSFET
LDO mode makes CHRIN voltage stable around
5.5V
Range of operation input voltage: Max 15V
Charging current up to 1A
Environment Temperature: -20~ 85
Available in DFN8(2x2) Package
APPLICATION
Cell phone and other portable device
The A4102 provides complete Li+ charger
protections and saves the external MOSFET and
Schottky diode for the charger of cell phone’s
PMIC. It is available in a DFN8(2x2) package.
TYPICAL APPLICATION
The above features and small package make the
A4102 an ideal part for cell phones applications.
The A4102 is available in DFN8(2x2) Package.
ORDERING INFORMATION
Package Type
Part Number
DFN8
(2x2)
J8 A4102J8R
A4102J8VR
Note
R: Tape & Reel
V: Halogen free Package
AiT provides all RoHS products
Suffix “ V “ means Halogen free Package
REV1.0 - JAN 2012 RELEASED -
-1-









No Preview Available !

A4102 Даташит, Описание, Даташиты
AiT Semiconductor Inc.
www.ait-ic.com
PIN DESCRIPTION
A4102
LDO MODE OVP WITH INTEGRATED P-MOSFET
BATTERY MANAGEMENT
Pin #
1, 2
3
4
5
6
7, 8
Top View
Symbol
ACIN
Input
GND
Ground
NC No Connected
GATDRV
Gate Driver
CHRIN
Charge
OUT
Output
Function
THERMAL RESISTANCE RATING
Parameter
Package Symbol Typical
Unit
Junction-to-Ambient Resistance in Free Air NOTE
DFN8(2x2)
θ JA
80 /W
NOTE: θJA is measured with the component mounted on a high effective thermal conductivity test board in free air. The exposed pad of
DFN8(2x2) is soldered directly on the PCB.
REV1.0 - JAN 2012 RELEASED -
-2-









No Preview Available !

A4102 Даташит, Описание, Даташиты
AiT Semiconductor Inc.
www.ait-ic.com
A4102
LDO MODE OVP WITH INTEGRATED P-MOSFET
BATTERY MANAGEMENT
ABSOLUTE MAXIMUM RATINGS
VACIN, ACIN Input Voltage (ACIN to GND)
-0.3V ~ 15V
VCHRIN, CHRIN to GND Voltage
-0.3V ~ 6V
VGATDRV, GATDRV to GND Voltage
-0.3V ~ VCHRIN
VOUT, OUT to GND Voltage
-0.3V ~ 6V
PD, Output power limit, IOUT x (VACIN - VOUT)
0.75W
TJ, Maximum Junction Temperature
150
TSTG, Storage Temperature
-40℃~+150
TSDR, Maximum Lead Soldering Temperature, 10 Seconds
260
Stresses above may cause permanent damage to the device. These are stress ratings only and functional operation of the device at
these or any other conditions beyond those indicated in the Electrical Characteristics are not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.
RECOMMENDED OPERATION CONDITIONS
Parameter
ACIN Input Voltage (ACIN to GND)
Output Current
Ambient Temperature
Junction Temperature
Symbol
V ACIN
I OUT
TA
TJ
Range
4.5V ~ 10V
0mA ~ 700mA
-40~ 85
-40~ 125
REV1.0 - JAN 2012 RELEASED -
-3-










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