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PDF STGIPN3H60 Data sheet ( Hoja de datos )

Número de pieza STGIPN3H60
Descripción 3A - 600V 3-phase IGBT inverter bridge
Fabricantes STMicroelectronics 
Logotipo STMicroelectronics Logotipo



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STGIPN3H60
SLLIMM™-nano (small low-loss intelligent molded module)
IPM, 3 A - 600 V 3-phase IGBT inverter bridge
Datasheet - production data
Applications
3-phase inverters for motor drives
Dish washers, refrigerator compressors,
heating systems, air-conditioning fans,
draining and recirculation pumps
NDIP-26L
Features
IPM 3 A, 600 V, 3-phase IGBT inverter bridge
including control ICs for gate driving and
freewheeling diodes
Optimized for low electromagnetic interference
VCE(sat) negative temperature coefficient
3.3 V, 5 V, 15 V CMOS/TTL inputs
comparators with hysteresis and pull down/pull
up resistors
Undervoltage lockout
Internal bootstrap diode
Interlocking function
Smart shutdown function
Comparator for fault protection against
overtemperature and overcurrent
Op amp for advanced current sensing
Optimized pinout for easy board layout
Description
This intelligent power module implements a
compact, high performance AC motor drive in a
simple, rugged design. It is composed of six
IGBTs with freewheeling diodes and three half-
bridge HVICs for gate driving, providing low
electromagnetic interference (EMI) characteristics
with optimized switching speed. The package is
optimized for thermal performance and
compactness in built-in motor applications, or
other low power applications where assembly
space is limited. This IPM includes an operational
amplifier, completely uncommitted, and a
comparator that can be used to design a fast and
efficient protection circuit. SLLIMM™ is a
trademark of STMicroelectronics.
Order code
STGIPN3H60
Table 1. Device summary
Marking
Package
GIPN3H60
NDIP-26L
Packaging
Tube
December 2014
This is information on a product in full production.
DocID018957 Rev 6
1/22
www.st.com

1 page




STGIPN3H60 pdf
STGIPN3H60
Internal schematic diagram and pin configuration
Figure 2. Pin layout (top view)
(*) Dummy pin internally connected to P (positive DC input).
DocID018957 Rev 6
5/22
22

5 Page





STGIPN3H60 arduino
STGIPN3H60
Electrical characteristics
Symbol
ISDl
Dt
Table 10. Logic inputs (VCC = 15 V unless otherwise specified)
Parameter
Test conditions
Min. Typ.
SD logic “1” input bias current
Dead time
SD = 0 V
see Figure 5
180
Max.
3
Unit
µA
ns
Table 11. OPAMP characteristics (VCC = 15 V unless otherwise specified)
Symbol
Parameter
Test condition
Min. Typ. Max.
Vio Input offset voltage
Vic = 0 V, Vo = 7.5 V
Iio Input offset current
Iib Input bias current (1)
Vic = 0 V, Vo = 7.5 V
Vicm
Input common mode voltage
range
VOL Low level output voltage
VOH High level output voltage
Io Output short-circuit current
SR Slew rate
RL = 10 kW to VCC
RL = 10 kW to GND
Source,
Vid = +1; Vo = 0 V
Sink,
Vid = -1; Vo = VCC
Vi = 1 - 4 V; CL = 100 pF;
unity gain
6
4 40
100 200
0
75 150
14 14.7
16 30
50 80
2.5 3.8
GBWP
Avd
SVR
CMRR
Gain bandwidth product
Large signal voltage gain
Supply voltage rejection ratio
Common mode rejection ratio
Vo = 7.5 V
RL = 2 kW
vs. VCC
8 12
70 85
60 75
55 70
1. The direction of input current is out of the IC.
Unit
mV
nA
nA
V
mV
V
mA
mA
V/µs
MHz
dB
dB
dB
Table 12. Sense comparator characteristics (VCC = 15 V unless otherwise specified)
Symbol
Parameter
Test conditions
Min. Typ. Max. Unit
Iib
Vol
td_comp
SR
tsd
tisd
Input bias current
Open drain low level output
voltage
VCIN = 1 V
Iod = 3 mA
Comparator delay
SD/OD pulled to 5 V through
100 kΩ resistor
Slew rate
Shutdown to high / low side
driver propagation delay
Comparator triggering to high /
low side driver turn-off
propagation delay
CL = 180 pF; Rpu = 5 kΩ
VOUT = 0, Vboot = VCC,
VIN = 0 to 3.3 V
Measured applying a voltage
step from 0 V to 3.3 V to pin
CIN
50
50
3 µA
0.5 V
90 130 ns
60 V/µsec
125 200
ns
200 250
DocID018957 Rev 6
11/22
22

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