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Спецификация 3400 изготовлена ​​​​«Intel» и имеет функцию, называемую «5 Series Chipset».

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Номер произв 3400
Описание 5 Series Chipset
Производители Intel
логотип Intel логотип 

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Intel® 5 Series Chipset and
Intel® 3400 Series Chipset
Datasheet
January 2012
Document Number: 322169-004









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INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL PRODUCTS. NO LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR
OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS DOCUMENT. EXCEPT AS PROVIDED IN INTEL'S TERMS AND CONDITIONS
OF SALE FOR SUCH PRODUCTS, INTEL ASSUMES NO LIABILITY WHATSOEVER AND INTEL DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY, RELATING
TO SALE AND/OR USE OF INTEL PRODUCTS INCLUDING LIABILITY OR WARRANTIES RELATING TO FITNESS FOR A PARTICULAR PURPOSE,
MERCHANTABILITY, OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT.
UNLESS OTHERWISE AGREED IN WRITING BY INTEL, THE INTEL PRODUCTS ARE NOT DESIGNED NOR INTENDED FOR ANY APPLICATION IN WHICH THE
FAILURE OF THE INTEL PRODUCT COULD CREATE A SITUATION WHERE PERSONAL INJURY OR DEATH MAY OCCUR.
Intel may make changes to specifications and product descriptions at any time, without notice. Designers must not rely on the absence or characteristics
of any features or instructions marked "reserved" or "undefined." Intel reserves these for future definition and shall have no responsibility whatsoever
for conflicts or incompatibilities arising from future changes to them. The information here is subject to change without notice. Do not finalize a design
with this information.
The products described in this document may contain design defects or errors known as errata which may cause the product to deviate from published
specifications. Current characterized errata are available on request.
Contact your local Intel sales office or your distributor to obtain the latest specifications and before placing your product order.
Copies of documents which have an order number and are referenced in this document, or other Intel literature, may be obtained at http://
www.intel.com/design/literature.htm.
Code names featured are used internally within Intel to identify products that are in development and not yet publicly announced for release.
Customers, licensees and other third parties are not authorized by Intel to use code names in advertising, promotion or marketing of any product or
services and any such use of Intel's internal code names is at the sole risk of the user.
Intel® Virtualization Technology requires a computer system with an enabled Intel® processor, BIOS, virtual machine monitor (VMM). Functionality,
performance or other benefits will vary depending on hardware and software configurations. Software applications may not be compatible with all
operating systems. Consult your PC manufacturer. For more information, visit: http://www.intel.com/go/virtualization.
Intel® Active Management Technology requires activation and a system with a corporate network connection, an Intel® AMT-enabled chipset, network
hardware and software. For notebooks, Intel AMT may be unavailable or limited over a host OS-based VPN, when connecting wirelessly, on battery
power, sleeping, hibernating or powered off. Results dependent upon hardware, setup & configuration. For more information, visit http://
www.intel.com/technology/platform-technology/intel-amt.
Intel® High Definition Audio (Intel® HD Audio) requires an Intel® HD Audio enabled system. Consult your PC manufacturer for more information.
Sound quality will depend on equipment and actual implementation. For more information about Intel HD Audio, refer to http://www.intel.com/design/
chipsets/hdaudio.htm.
The original equipment manufacturer must provide TPM functionality, which requires a TPM-supported BIOS. TPM functionality must be initialized and
may not be available in all countries.
Intel® Anti-Theft Technology-PC Protection (Intel® AT-p). No computer system can provide absolute security under all conditions. Intel® Anti-Theft
Technology (Intel® AT-p) requires the computer system to have an Intel® AT-enabled chipset, BIOS, firmware release, software and an Intel AT-capable
Service Provider/ISV application and service subscription. The detection (triggers), response (actions), and recovery mechanisms only work after the
Intel® AT functionality has been activated and configured. Certain functionality may not be offered by some ISVs or service providers and may not be
available in all countries. Intel assumes no liability for lost or stolen data and/or systems or any other damages resulting thereof.
Systems using Client Initiated Remote Access require wired LAN connectivity and may not be available in public hot spots or "click to accept" locations.
For more information, refer to http://software.intel.com/en-us/blogs/2008/10/09/new-with-intel-amt-4050-fast-call-for-help-and-remote-pc-assist-aka-
cira/
Intel and the Intel logo are trademarks of Intel Corporation in the U.S. and other countries.
*Other names and brands may be claimed as the property of others.
Copyright © 2012, Intel Corporation. All rights reserved.
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Contents
1 Introduction ............................................................................................................ 43
1.1 About This Manual ............................................................................................. 43
1.2 Overview ......................................................................................................... 47
1.2.1 Capability Overview ............................................................................. 49
1.3 Intel® 5 Series Chipset and Intel® 3400 Series Chipset SKU Definition ..................... 55
1.4 Reference Documents ........................................................................................ 57
2 Signal Description ................................................................................................... 59
2.1 Direct Media Interface (DMI) to Host Controller ..................................................... 61
2.2 PCI Express* .................................................................................................... 61
2.3 Firmware Hub Interface...................................................................................... 62
2.4 PCI Interface .................................................................................................... 63
2.5 Serial ATA Interface........................................................................................... 65
2.6 LPC Interface.................................................................................................... 68
2.7 Interrupt Interface ............................................................................................ 68
2.8 USB Interface ................................................................................................... 69
2.9 Power Management Interface.............................................................................. 71
2.10 Processor Interface............................................................................................ 74
2.11 SMBus Interface................................................................................................ 74
2.12 System Management Interface............................................................................ 75
2.13 Real Time Clock Interface ................................................................................... 75
2.14 Miscellaneous Signals ........................................................................................ 76
2.15 Intel® High Definition Audio Link ......................................................................... 77
2.16 Controller Link .................................................................................................. 78
2.17 Serial Peripheral Interface (SPI) .......................................................................... 78
2.18 Intel® Quiet System Technology and Thermal Reporting ......................................... 79
2.19 JTAG Signals .................................................................................................... 80
2.20 Clock Signals .................................................................................................... 80
2.21 LVDS Signals (Mobile only) ................................................................................. 82
2.22 Analog Display /CRT DAC Signals ........................................................................ 83
2.23 Intel® Flexible Display Interface (FDI).................................................................. 84
2.24 Digital Display Signals........................................................................................ 84
2.25 General Purpose I/O Signals ............................................................................... 87
2.26 Manageability Signals ........................................................................................ 90
2.27 Power and Ground Signals .................................................................................. 91
2.28 Pin Straps ........................................................................................................ 93
2.28.1 Functional Straps ................................................................................ 93
2.28.2 External RTC Circuitry.......................................................................... 97
3 PCH Pin States......................................................................................................... 99
3.1 Integrated Pull-Ups and Pull-Downs ..................................................................... 99
3.2 Output and I/O Signals Planes and States........................................................... 101
3.3 Power Planes for Input Signals .......................................................................... 112
4 System Clocks ....................................................................................................... 119
5 Functional Description ........................................................................................... 123
5.1 DMI-to-PCI Bridge (D30:F0) ............................................................................. 123
5.1.1 PCI Bus Interface .............................................................................. 123
5.1.2 PCI Bridge As an Initiator ................................................................... 123
5.1.2.1
Memory Reads and Writes .................................................... 124
5.1.2.2
I/O Reads and Writes .......................................................... 124
5.1.2.3
Configuration Reads and Writes ............................................ 124
5.1.2.4
Locked Cycles ..................................................................... 124
5.1.2.5
Target / Master Aborts ......................................................... 124
5.1.2.6
Secondary Master Latency Timer ........................................... 124
5.1.2.7
Dual Address Cycle (DAC) .................................................... 124
5.1.2.8
Memory and I/O Decode to PCI ............................................. 125
5.1.3 Parity Error Detection and Generation .................................................. 125
5.1.4 PCIRST# .......................................................................................... 126
5.1.5 Peer Cycles ...................................................................................... 126
5.1.6 PCI-to-PCI Bridge Model..................................................................... 127
5.1.7 IDSEL to Device Number Mapping ....................................................... 127
Datasheet
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