DataSheet26.com

ispPAC-POWR1014A PDF даташит

Спецификация ispPAC-POWR1014A изготовлена ​​​​«Lattice Semiconductor» и имеет функцию, называемую «In-System Programmable Power Supply Supervisor / Reset Generator and Sequencing Controller».

Детали детали

Номер произв ispPAC-POWR1014A
Описание In-System Programmable Power Supply Supervisor / Reset Generator and Sequencing Controller
Производители Lattice Semiconductor
логотип Lattice Semiconductor логотип 

30 Pages
scroll

No Preview Available !

ispPAC-POWR1014A Даташит, Описание, Даташиты
ispPAC-® POWR1014/A
In-System Programmable Power Supply Supervisor,
Reset Generator and Sequencing Controller
March 2015
Data Sheet DS1014
Features
Monitor and Control Multiple Power Supplies
• Simultaneously monitors up to 10 power
supplies
• Provides up to 14 output control signals
• Programmable digital and analog circuitry
Embedded PLD for Sequence Control
• 24-macrocell CPLD implements both state
machines and combinatorial logic functions
Embedded Programmable Timers
• Four independent timers
• 32µs to 2 second intervals for timing sequences
Analog Input Monitoring
• 10 independent analog monitor inputs
• Two programmable threshold comparators per
analog input
• Hardware window comparison
• 10-bit ADC for I2C monitoring (ispPAC-
POWR1014A only)
High-Voltage FET Drivers
• Power supply ramp up/down control
• Programmable current and voltage output
• Independently configurable for FET control or
digital output
2-Wire (I2C/SMBus™ Compatible) Interface
• Comparator status monitor
• ADC readout
• Direct control of inputs and outputs
• Power sequence control
• Only available with ispPAC-POWR1014A
3.3 V Operation, Wide Supply Range 2.8 V
to 3.96 V
• Industrial temperature range: –40°C to +85°C
• 48-pin TQFP package, lead-free option
Multi-Function JTAG Interface
• In-system programming
• Access to all I2C registers
• Direct input control
Application Block Diagram
Primary
Supply
3.3 V
Primary
Supply
Primary
Supply
2.5 V
1.8 V
Primary
Supply
POL#1
Primary
Supply
POL#N
Other Control/Supervisory
Signals
12 Digital
Outputs
2 MOSFET
Drivers
ADC*
4 Timers
ispPAC-POWR1014A
*ispPAC-POWR1014A only.
CPLD
24 Macrocells
53 Inputs
4 Digital
Inputs
I2C
Interface
I2C
Bus*
CPU
Description
Lattice’s Power Manager II ispPAC-POWR1014/A is a
general-purpose power-supply monitor and sequence
controller, incorporating both in-system programmable
logic and in-system programmable analog functions
implemented in non-volatile E2CMOS® technology. The
ispPAC-POWR1014/A device provides 10 independent
analog input channels to monitor up to 10 power supply
test points. Each of these input channels has two inde-
pendently programmable comparators to support both
high/low and in-bounds/out-of-bounds (window-com-
pare) monitor functions. Four general-purpose digital
inputs are also provided for miscellaneous control func-
tions.
The ispPAC-POWR1014/A provides 14 open-drain digi-
tal outputs that can be used for controlling DC-DC con-
verters, low-drop-out regulators (LDOs) and opto-
couplers, as well as for supervisory and general-pur-
pose logic interface functions. Two of these outputs
(HVOUT1-HVOUT2) may be configured as high-voltage
© 2015 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other
brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without
notice.
www.latticesemi.com
1
DS1014_2.1









No Preview Available !

ispPAC-POWR1014A Даташит, Описание, Даташиты
ispPAC-POWR1014/A Data Sheet
MOSFET drivers. In high-voltage mode these outputs can provide up to 12 V for driving the gates of n-channel
MOSFETs so that they can be used as high-side power switches controlling the supplies with a programmable
ramp rate for both ramp up and ramp down.
The ispPAC-POWR1014/A incorporates a 24-macrocell CPLD that can be used to implement complex state
machine sequencing for the control of multiple power supplies as well as combinatorial logic functions. The status
of all of the comparators on the analog input channels as well as the general purpose digital inputs are used as
inputs by the CPLD array, and all digital outputs may be controlled by the CPLD. Four independently programmable
timers can create delays and time-outs ranging from 32 µs to 2 seconds. The CPLD is programmed using Logi-
Builder™, an easy-to-learn language integrated into the PAC-Designer® software. Control sequences are written to
monitor the status of any of the analog input channel comparators or the digital inputs.
The on-chip 10-bit A/D converter is used to monitor the VMON voltage through the I2C bus or JTAG interface of the
ispPAC-POWR1014A device.
The I2C bus/SMBus interface allows an external microcontroller to measure the voltages connected to the VMON
inputs, read back the status of each of the VMON comparator and PLD outputs, control logic signals IN2 to IN4 and
control the output pins (ispPAC-POWR1014A only). The JTAG interface can be used to read out all I2C registers
during manufacturing.
Figure 1. ispPAC-POWR1014/A Block Diagram
VMON1
VMON2
VMON3
VMON4
VMON5
VMON6
VMON7
VMON8
VMON9
VMON10
IN1
IN2
IN3
IN4
ADC*
MEASUREMENT
CONTROL LOGIC*
CPLD
24 MACROCELLS
53 INPUTS
JTAG LOGIC
CLOCK
OSCILLATOR
TIMERS
(4)
I2C
INTERFACE
HVOUT1
HVOUT2
OUT3/(SMBA*)
OUT4
OUT5
OUT6
OUT7
OUT8
OUT9
OUT10
OUT11
OUT12
OUT13
OUT14
*ispPAC-POWR1014A only.
2









No Preview Available !

ispPAC-POWR1014A Даташит, Описание, Даташиты
ispPAC-POWR1014/A Data Sheet
Pin Descriptions
Number Name
Pin Type
Voltage Range
Description
44 IN1
Digital Input
VCCINP1, 2
PLD Logic Input 1 Registered by MCLK
46 IN2
Digital Input
VCCINP1, 3
PLD Logic Input 2 Registered by MCLK
47 IN3
Digital Input
VCCINP1, 3
PLD Logic Input 3 Registered by MCLK
48 IN4
Digital Input
VCCINP1, 3
PLD Logic Input 4 Registered by MCLK
25 VMON111 Analog Input
–0.3 V to 5.87 V
Voltage Monitor 1 Input
26 VMON211 Analog Input
–0.3 V to 5.87 V
Voltage Monitor 2 Input
27 VMON311 Analog Input
–0.3 V to 5.87 V
Voltage Monitor 3 Input
28 VMON411 Analog Input
–0.3 V to 5.87 V
Voltage Monitor 4 Input
32 VMON511 Analog Input
–0.3 V to 5.87 V
Voltage Monitor 5 Input
33 VMON611 Analog Input
–0.3 V to 5.87 V
Voltage Monitor 6 Input
34 VMON711 Analog Input
–0.3 V to 5.87 V
Voltage Monitor 7 Input
35 VMON811 Analog Input
–0.3 V to 5.87 V
Voltage Monitor 8 Input
36 VMON911 Analog Input
–0.3 V to 5.87 V
Voltage Monitor 9 Input
37 VMON1011 Analog Input
–0.3 V to 5.87 V
Voltage Monitor 10 Input
7, 31 GNDD4
Ground
Ground
Digital Ground
30 GNDA4
Ground
Ground
Analog Ground
41, 23 VCCD5
Power
2.8 V to 3.96 V
Core VCC, Main Power Supply
29 VCCA5
Power
2.8 V to 3.96 V
Analog Power Supply
45 VCCINP Power
2.25 V to 5.5 V
VCC for IN[1:4] Inputs
20 VCCJ
Power
2.25 V to 3.6 V
VCC for JTAG Logic Interface Pins
24 APS9
15 HVOUT1
Alternate Programming
Supply
3.0 V to 3.6 V
Open Drain Output6
0 V to 13 V
Alternate E2 Programming Supply; use only
when the Device is Not Powered by VCCD and
VCCA.
Open-Drain Output 1
Current Source/Sink
12.5 µA to 100 µA Source
100 µA to 3000 µA Sink
High-voltage FET Gate Driver 1
14 HVOUT2
Open Drain Output6
Current Source/Sink
0 V to 13 V
Open-Drain Output 2
12.5 µA to 100 µA Source
100 µA to 3000 µA Sink
High-voltage FET Gate Driver 2
13
SMBA_OUT
3
Open Drain Output6
0 V to 5.5 V
Open-Drain Output 3, (SMBUS Alert Active Low,
ispPAC-POWR1014A only).
12 OUT4
Open Drain Output6
0 V to 5.5 V
Open-Drain Output 4
11 OUT5
Open Drain Output6
0 V to 5.5 V
Open-Drain Output 5
10 OUT6
Open Drain Output6
0 V to 5.5 V
Open-Drain Output 6
9 OUT7
Open Drain Output6
0 V to 5.5 V
Open-Drain Output 7
8 OUT8
Open Drain Output6
0 V to 5.5 V
Open-Drain Output 8
6 OUT9
Open Drain Output6
0 V to 5.5 V
Open-Drain Output 9
5 OUT10
Open Drain Output6
0 V to 5.5 V
Open-Drain Output 10
4 OUT11
Open Drain Output6
0 V to 5.5 V
Open-Drain Output 11
3 OUT12
Open Drain Output6
0 V to 5.5 V
Open-Drain Output 12
2 OUT13
Open Drain Output6
0 V to 5.5 V
Open-Drain Output 13
1 OUT14
Open Drain Output6
0 V to 5.5 V
Open-Drain Output 14
40 RESETb7 Digital I/O
0 V to 3.96 V
Device Reset (Active Low)
Pin internally pulled up.
3










Скачать PDF:

[ ispPAC-POWR1014A.PDF Даташит ]

Номер в каталогеОписаниеПроизводители
ispPAC-POWR1014In-System Programmable Power Supply Supervisor / Reset Generator and Sequencing ControllerLattice Semiconductor
Lattice Semiconductor
ispPAC-POWR1014AIn-System Programmable Power Supply Supervisor / Reset Generator and Sequencing ControllerLattice Semiconductor
Lattice Semiconductor

Номер в каталоге Описание Производители
TL431

100 мА, регулируемый прецизионный шунтирующий регулятор

Unisonic Technologies
Unisonic Technologies
IRF840

8 А, 500 В, N-канальный МОП-транзистор

Vishay
Vishay
LM317

Линейный стабилизатор напряжения, 1,5 А

STMicroelectronics
STMicroelectronics

DataSheet26.com    |    2020    |

  Контакты    |    Поиск