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PDF LM75B Data sheet ( Hoja de datos )
| Número de pieza | LM75B | |
| Descripción | Digital temperature sensor and thermal watchdog | |
| Fabricantes | NXP Semiconductors | |
| Logotipo |  |
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LM75B
Digital temperature sensor and thermal watchdog
Rev. 02 — 9 December 2008
Product data sheet
1. General description
The LM75B is a temperature-to-digital converter using an on-chip band gap temperature
sensor and Sigma-Delta A-to-D conversion technique with an overtemperature detection
output. The LM75B contains a number of data registers: Configuration register (Conf) to
store the device settings such as device operation mode, OS operation mode, OS polarity
and OS fault queue as described in Section 7 “Functional description”; temperature
register (Temp) to store the digital temp reading, and set-point registers (Tos and Thyst) to
store programmable overtemperature shutdown and hysteresis limits, that can be
communicated by a controller via the 2-wire serial I2C-bus interface. The device also
includes an open-drain output (OS) which becomes active when the temperature exceeds
the programmed limits. There are three selectable logic address pins so that eight devices
can be connected on the same bus without address conflict.
The LM75B can be configured for different operation conditions. It can be set in normal
mode to periodically monitor the ambient temperature, or in shutdown mode to minimize
power consumption. The OS output operates in either of two selectable modes:
OS comparator mode or OS interrupt mode. Its active state can be selected as either
HIGH or LOW. The fault queue that defines the number of consecutive faults in order to
activate the OS output is programmable as well as the set-point limits.
The temperature register always stores an 11-bit 2's complement data giving a
temperature resolution of 0.125 °C. This high temperature resolution is particularly useful
in applications of measuring precisely the thermal drift or runaway. When the LM75B is
accessed the conversion in process is not interrupted (i.e., the I2C-bus section is totally
independent of the Sigma-Delta converter section) and accessing the LM75B
continuously without waiting at least one conversion time between communications will
not prevent the device from updating the Temp register with a new conversion result. The
new conversion result will be available immediately after the Temp register is updated.
The LM75B powers up in the normal operation mode with the OS in comparator mode,
temperature threshold of 80 °C and hysteresis of 75 °C, so that it can be used as a
stand-alone thermostat with those pre-defined temperature set points.
2. Features
I Pin-for-pin replacement for industry standard LM75 and LM75A and offers improved
temperature resolution of 0.125 °C and specification of a single part over power supply
range from 2.8 V to 5.5 V
I I2C-bus interface with up to 8 devices on the same bus
I Power supply range from 2.8 V to 5.5 V
I Temperatures range from −55 °C to +125 °C
1 page  
NXP Semiconductors
LM75B
Digital temperature sensor and thermal watchdog
In OS comparator mode, the OS output behaves like a thermostat. It becomes active
when the Temp exceeds the Tth(ots), and is reset when the Temp drops below the Thys.
Reading the device registers or putting the device into shutdown does not change the
state of the OS output. The OS output in this case can be used to control cooling fans or
thermal switches.
In OS interrupt mode, the OS output is used for thermal interruption. When the device is
powered-up, the OS output is first activated only when the Temp exceeds the Tth(ots); then
it remains active indefinitely until being reset by a read of any register. Once the OS output
has been activated by crossing Tth(ots) and then reset, it can be activated again only when
the Temp drops below the Thys; then again, it remains active indefinitely until being reset
by a read of any register. The OS interrupt operation would be continued in this sequence:
Tth(ots) trip, Reset, Thys trip, Reset, Tth(ots) trip, Reset, Thys trip, Reset, etc. Putting the
device into the shutdown mode by setting the bit 0 of the configuration register also resets
the OS output.
In both cases, comparator mode and interrupt mode, the OS output is activated only if a
number of consecutive faults, defined by the device fault queue, has been met. The fault
queue is programmable and stored in the two bits, B3 and B4, of the Configuration
register. Also, the OS output active state is selectable as HIGH or LOW by setting
accordingly the configuration register bit B2.
At power-up, the device is put into normal operation mode, the Tth(ots) is set to 80 °C, the
Thys is set to 75 °C, the OS active state is selected LOW and the fault queue is equal to 1.
The temp reading data is not available until the first conversion is completed in about
100 ms.
The OS response to the temperature is illustrated in Figure 5.
Tth(ots)
Thys
OS reset
OS active
reading temperature limits
OS output in comparator mode
OS reset
OS active
(1) (1)
OS output in interrupt mode
(1)
002aae334
(1) OS is reset by either reading register or putting the device in shutdown mode. It is assumed that
the fault queue is met at each Tth(ots) and Thys crossing point.
Fig 5. OS response to temperature
LM75B_2
Product data sheet
Rev. 02 — 9 December 2008
© NXP B.V. 2008. All rights reserved.
5 of 29
5 Page 
NXP Semiconductors
LM75B
Digital temperature sensor and thermal watchdog
7.7 OS fault queue
Fault queue is defined as the number of faults that must occur consecutively to activate
the OS output. It is provided to avoid false tripping due to noise. Because faults are
determined at the end of data conversions, fault queue is also defined as the number of
consecutive conversions returning a temperature trip. The value of fault queue is
selectable by programming the two bits B4 and B3 (OS_F_QUE[1:0]) in register Conf.
Notice that the programmed data and the fault queue value are not the same. Table 13
shows the one-to-one relationship between them. At power-up, fault queue data = 0 and
fault queue value = 1.
Table 13. Fault queue table
Fault queue data
OS_F_QUE[1]
0
0
1
1
OS_F_QUE[0]
0
1
0
1
Fault queue value
Decimal
1
2
4
6
7.8 Shutdown mode
The device operation mode is selected by programming bit B0 (SHUTDOWN) of register
Conf. Setting bit SHUTDOWN to logic 1 will put the device into shutdown mode. Resetting
bit SHUTDOWN to logic 0 will return the device to normal mode.
In shutdown mode, the device draws a small current of approximately 1.0 µA and the
power dissipation is minimized; the temperature conversion stops, but the I2C-bus
interface remains active and register write/read operation can be performed. When the
shutdown is set, the OS output will be unchanged in comparator mode and reset in
interrupt mode.
7.9 Power-up default and power-on reset
The LM75B always powers-up in its default state with:
• Normal operation mode
• OS comparator mode
• Tth(ots) = 80 °C
• Thys = 75 °C
• OS output active state is LOW
• Pointer value is logic 00 (Temp)
When the power supply voltage is dropped below the device power-on reset level of
approximately 1.0 V (POR) for over 2 µs and then rises up again, the device will be reset
to its default condition as listed above.
LM75B_2
Product data sheet
Rev. 02 — 9 December 2008
© NXP B.V. 2008. All rights reserved.
11 of 29
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