QN8006LB PDF даташит
Спецификация QN8006LB изготовлена «Quintic» и имеет функцию, называемую «High Performance Digital FM Transceiver». |
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Детали детали
Номер произв | QN8006LB |
Описание | High Performance Digital FM Transceiver |
Производители | Quintic |
логотип |
30 Pages
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QN8006B/8006LB
High Performance Digital FM Transceiver for Portable Devices
__________________________ General Description __________________________
The QN8006 is a high performance, low power, fully integrated single-chip stereo FM transceiver designed for cell phones,
PMP/PNDs, and portable radios. It integrates both FM receiving and transmitting functions, auto-seek and clear channel
scan, and antenna tuning to ease matching in real applications. Advanced digital architecture enables superior receiver
sensitivity, crystal clear audio, unsurpassed spectral purity, ultra-low harmonic and spurious levels, and high immunity to
TDMA burst noise.
With its small footprint, minimal external component count and multiple clock frequency support, the QN8006 is easy to
integrate into a variety of small form-factor low power portable applications. An integrated voltage regulator enables direct
connection to a battery and provides high PSRR for superior noise suppression. A low-power Standby mode extends battery
life. ESD protection is on all pins. The QN8006 is fabricated in highly reliable CMOS technology.
_____________________________ Key Features _____________________________
• Worldwide FM Band Receive and Transmit
• 76 MHz ~ 108 MHz full band tuning in
50/100/200 kHz step sizes
• 50/75µs pre-emphasis and de-emphasis
• High Performance FM Receiver (FMR)
• Superior sensitivity: 1.2µVEMF
• High SNR: 66dB Stereo
• Ultra Low THD: 0.03%
• High interference rejection
• Integrated adaptive noise cancellation (SNC, HCC,
SM)
• Auto channel seek
• High Performance FM Transmitter (FMT)
• 66dB Stereo SNR, 0.03% THD
• Maximum 121dBµVp RF output level with 42dB
adjustable range
• Integrated Clear Channel Scan
• RDS/RBDS Transmit & Receive (QN8006B
Supported)
• Supports US and European data service,
including TMC (Traffic Messaging Channel)
• Very Low Power Consumption
• 9.2mA (Transmit Mode), 17mA (Receive Mode)
• Integrated voltage regulator, direct connect to battery
• Power saving IDLE and Standby modes
• Low shutdown leakage current
• Flexible Audio Interfaces
• Digital audio interface supports I2S and a variety of
PCM data formats with 4 different data rates
• Programmable analog audio input/output
• Integrated audio AGC and soft clipping
• Ease of Integration
• Small footprint, 4 x 4 x 0.85 mm3 QFN24
• Adaptive antenna tuning
• Low cellular and GPS band spurs
• High Immunity to TDMA (GSM/GPRS) burst noise
• Multiple crystal frequencies supported
• 2-wire and 3-wire control interfaces
• Robust Operation
• -250C to +850C operation
• ESD protection on all input and output pads
_____________________________ Typical Applications __________________________
Cell Phones / PDAs / Smart Phones
Portable Audio & Media Players
GPS Personal Navigation Devices
Automotive Accessories
Rev 2.08 (04/10)
Confidential A
Copyright ©2010 by Quintic Corporation
Confidential Information contained herein is covered under Non-Disclosure Agreement (NDA).
Page 1
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QN8006B/8006LB
CONTENTS
1 Functional Block Diagram .................................................................................................................................4
2 Pin Assignments..................................................................................................................................................5
3 Electrical Specifications .....................................................................................................................................7
3.1 I2S Interface Timing..................................................................................................................17
4 Functional Description .....................................................................................................................................21
4.1 Transmit Mode..........................................................................................................................21
4.2 Receive Mode ...........................................................................................................................21
4.3 Idle and Standby Mode .............................................................................................................21
4.4 Audio Interface .........................................................................................................................21
4.5 Audio Processing ......................................................................................................................22
4.6 Channel Setting.........................................................................................................................23
4.7 RDS/RBDS ...............................................................................................................................24
5 Control Interface Protocol ................................................................................................................................25
5.1 2-Wire Serial Control Interface.................................................................................................25
5.2 3-Wire Serial Control Interface.................................................................................................26
6 Digital Audio Interface Protocol......................................................................................................................27
6.1 Introduction...............................................................................................................................27
6.2 I2S BUS Signal Description ......................................................................................................27
6.3 I2S Interface Timing Description ..............................................................................................28
6.3.1 MSB-Justified (Format 0) ...........................................................................................................28
6.3.2 I2S (Format 1) .............................................................................................................................28
6.3.3 DSP1 (Format 2).........................................................................................................................29
6.3.4 DSP2 (Format 3).........................................................................................................................29
6.3.5 LSB-Justified (Format 4) ............................................................................................................29
7 User Control Registers......................................................................................................................................30
8 Package Description .........................................................................................................................................55
9 Solder Reflow Profile .......................................................................................................................................57
9.1 Package Peak Reflow Temperature ..........................................................................................57
9.2 Classification Reflow Profiles ..................................................................................................57
9.3 Maximum Reflow Times ..........................................................................................................58
Rev 2.08 (04/10)
Confidential A
Copyright ©2010 by Quintic Corporation
Confidential Information contained herein is covered under Non-Disclosure Agreement (NDA).
Page 2
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QN8006B/8006LB
REVISION HISTORY
REVISION
CHANGE DESCRIPTION
0.11
2.0
2.01
2.01b
2.01c
2.02
2.03
2.04
2.05
2.06
2.07
2.08
Initial from Qn8006/L datasheet v1.0
B1 register set incorporated.
Correct performance data in key feature section to accord with characteristics
table
Further explain PWROUT_CAL[7:0] at 0Ch;
Modify the CIDR1 05h 0/1/2/3 minor version
Modify the CIDR2 06h A/B/C/D major version;
Modify 2-wire to I2C, I2S to I2S, IDLE to IDLE, Table 1 and format
1. Table 3 Vcc range:2.7~5.0 v, TYP:3.3 v;
2. In Section 4.1: Modify 124 to 121dBµVp.
3. In Section 4.5: Delete” When there is no audio signal for a pre-determined
period, AGC will power down the transmitter. ”
Update the value in Section 2
Modify the register PWROUT_CAL PAC_TARGET and the description
Update the registers in Section 7.
Modify the description of register PAC_TARGET
1. Modify I2C to 2-wire;
2. Table 6: Rin 75 Ω 5 kΩ;
3. Add Reg 21h , Reg 22h, Reg 59h, Reg 5Ah.
4. Update the grammar and syntax
5. Modify Vain Max value: 1400 mV 2000 mV
Minor changes in the “Key features”
DATE
7/10/08
7/25/08
8/25/08
9/18/08
02/04/09
03/17/09
06/15/09
07/30/09
08/05/09
10/12/09
11/23/09
04/20/10
STATEMENT:
Users are responsible for compliance with local regulatory requirements for low power unlicensed FM
broadcast operation. Quintic is not responsible for any violations resulting from user’s intentional or
unintentional breach of regulatory requirements in personal or commercial use.
Rev 2.08 (04/10)
Confidential A
Copyright ©2010 by Quintic Corporation
Confidential Information contained herein is covered under Non-Disclosure Agreement (NDA).
Page 3
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Номер в каталоге | Описание | Производители |
QN8006L | High Performance Digital FM Transceiver | Quintic |
QN8006LB | High Performance Digital FM Transceiver | Quintic |
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