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KM23C4000DETY PDF даташит

Спецификация KM23C4000DETY изготовлена ​​​​«Samsung semiconductor» и имеет функцию, называемую «4M-Bit (512Kx8) CMOS MASK ROM».

Детали детали

Номер произв KM23C4000DETY
Описание 4M-Bit (512Kx8) CMOS MASK ROM
Производители Samsung semiconductor
логотип Samsung semiconductor логотип 

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KM23C4000DETY Даташит, Описание, Даташиты
KM23C4000D(E)TY
4M-Bit (512Kx8) CMOS MASK ROM
FEATURES
524,288 x 8 bit organization
Access time : 80ns(Max.)
Supply voltage : single +5V
Current consumption
Operating : 50mA(Max.)
Standby : 50µA(Max.)
Fully static operation
All inputs and outputs TTL compatible
Three state outputs
Package
-. KM23C4000D(E)TY : 32-TSOP1-0820
CMOS MASK ROM
GENERAL DESCRIPTION
The KM23C4000D(E)TY is a fully static mask programmable
ROM organized 524,288 x 8bit. It is fabricated using silicon
gate CMOS process technology.
This device operates with a 5V single power supply, and all
inputs and outputs are TTL compatible.
Because of its asynchronous operation, it requires no external
clock assuring extremely easy operation.
It is suitable for use in program memory of microprocessor, and
data memory, character generator.
The KM23C4000D(E)TY is packaged in a 32-TSOP1.
FUNCTIONAL BLOCK DIAGRAM
A18
.
.
.
.
.
.
.
.
A0
X
BUFFERS
AND
DECODER
Y
BUFFERS
AND
DECODER
MEMORY CELL
MATRIX
(524,288x8)
SENSE AMP.
BUFFERS
PRODUCT INFORMATION
Product
Operating Vcc Range Speed
Temp Range (Typical) (ns)
KM23C4000DTY
KM23C4000DETY
0°C~70°C
-20°C~85°C
5.0V
80
PIN CONFIGURATION
CE CONTROL
OE LOGIC
...
Q0 Q7
Pin Name
A0 - A18
Q0 - Q7
CE
OE
VCC
VSS
N.C
Pin Function
Address Inputs
Data Outputs
Chip Enable
Output Enable
Power(+5V)
Ground
No Connection
A11
A9
A8
A13
A14
A17
N.C
VCC
A18
A16
A15
A12
A7
A6
A5
A4
#1
#16
32-TSOP1
KM23C4000D(E)TY
#32
#17
OE
A10
CE
Q7
Q6
Q5
Q4
Q3
VSS
Q2
Q1
Q0
A0
A1
A2
A3









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KM23C4000DETY Даташит, Описание, Даташиты
KM23C4000D(E)TY
CMOS MASK ROM
ABSOLUTE MAXIMUM RATINGS
Item
Voltage on Any Pin Relative to VSS
Temperature Under Bias
Storage Temperature
Operating Temperature
Symbol
VIN
TBIAS
TSTG
TA
Rating
-0.3 to +7.0
-10 to +85
-55 to +150
0 to +70
-20 to +85
Unit Remark
V-
°C -
°C -
°C KM23C4000DTY
°C KM23C4000DETY
NOTE : Permanent device damage may occur if "ABSOLUTE MAXIMUM RATINGS" are exceeded. Functional operation should be restricted to the
conditions as detailed in the operational sections of this data sheet. Exposure to absolute maximum rating conditions for extended periods may
affect device reliability.
RECOMMENDED OPERATING CONDITIONS(Voltage reference to VSS)
Item
Symbol
Min
Typ
Supply Voltage
VCC 4.5
5.0
Supply Voltage
VSS 0
0
Max
5.5
0
Unit
V
V
DC CHARACTERISTICS
Parameter
Operating Current
Standby Current(TTL)
Standby Current(CMOS)
Input Leakage Current
Output Leakage Current
Input High Voltage, All Inputs
Input Low Voltage, All Inputs
Output High Voltage Level
Output Low Voltage Level
Symbol
ICC
ISB1
ISB2
ILI
ILO
VIH
VIL
VOH
VOL
Test Conditions
CE=OE=VIL, all outputs open
CE=VIH, all outputs open
CE=VCC, all outputs open
VIN=0 to VCC
VOUT=0 to VCC
IOH=-400µA
IOL=2.1mA
Min Max
- 50
-1
- 50
- 10
- 10
2.2 VCC+0.3
-0.3 0.8
2.4 -
- 0.4
NOTE : Minimum DC Voltage(VIL) is -0.3V an input pins. During transitions, this level may undershoot to -2.0V for periods <20ns.
Maximum DC voltage(VIH) is VCC+0.3V which, during transitions, may overshoot to VCC+2.0V for periods <20ns.
Unit
mA
mA
µA
µA
µA
V
V
V
V
MODE SELECTION
CE
H
L
OE
X
H
L
Mode
Standby
Operating
Operating
Data
High-Z
High-Z
Dout
Power
Standby
Active
Active
CAPACITANCE(TA=25°C, f=1.0MHz)
Item
Output Capacitance
Input Capacitance
Symbol
COUT
CIN
NOTE : Capacitance is periodically sampled and not 100% tested.
Test Conditions
VOUT=0V
VIN=0V
Min
-
-
Max
10
10
Unit
pF
pF









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KM23C4000DETY Даташит, Описание, Даташиты
KM23C4000D(E)TY
CMOS MASK ROM
AC CHARACTERISTICS(VCC=5V±10%, unless otherwise noted.)
TEST CONDITIONS
Item
Input Pulse Levels
Input Rise and Fall Times
Input and Output timing Levels
Output Loads
Value
0.6V to 2.4V
10ns
0.8V and 2.0V
1 TTL Gate and CL=100pF
READ CYCLE
Item
KM23C4000D(E)TY-8 KM23C4000D(E)TY-10 KM23C4000D(E)TY-12
Symbol
Min Max Min Max Min Max
Read Cycle Time tRC 80 100 120
Chip Enable Access Time
tACE
80
100 120
Address Access Time
tAA
80
100 120
Output Enable Access Time
tOE
40
50
60
Output or Chip Disable to
Output High-Z
tDF
20
20
20
Output Hold from Address Change tOH
0
0
0
Unit
ns
ns
ns
ns
ns
ns
TIMING DIAGRAM
READ
ADD
CE
OE
DOUT
ADD1
tACE
tRC
tOE
ADD2
tAA
VALID DATA
tOH
VALID DATA
tDF(Note)
NOTE : tDF is defined as the time at which the outputs achieve the open circuit condition and is not referenced to VOH or
VOL level.










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