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PDF NL160120AC27-32B Data sheet ( Hoja de datos )

Número de pieza NL160120AC27-32B
Descripción TFT COLOR LCD MODULE
Fabricantes NEC 
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TFT COLOR LCD MODULE
NL160120AC27-32B
54 cm (21.3 Type)
UXGA
LVDS Interface (2 port)
DATA SHEET
DOD-PP-1480 (1st edition)
This DATA SHEET is updated document from
PRELIMINARY DATA SHEET DOD-PP-1313(2).
All information is subject to change without notice.
Please confirm the sales representative before
starting to design your system.
Document Number: DOD-PP-1480 (1st edition)
Published date: September 2012 CP (N)
1
¤ NLT Technologies, Ltd.
2012 All rights reserved.
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NL160120AC27-32B pdf
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NL160120AC27-32B
2. GENERAL SPECIFICATIONS
Display area
432.0 (H) u 324.0 (V) mm
Diagonal size of display 54 cm (21.3 inches)
Drive system
a-Si TFT active matrix
Display color
16,777,216 colors
Pixel
1,600 (H) u 1,200 (V) pixels (1 pixel consists of 3 sub-pixels (RGB).)
Pixel arrangement
RGB (Red dot, Green dot, Blue dot) vertical stripe
Dot pitch
0.090 (H) u 0.270 (V) mm
Pixel pitch
0.270 (H) u 0.270 (V) mm
Module size
457.0 (W) u 350.0 (H) u 21.5 (D) mm (typ.)
Weight
2,700 g (typ.)
Contrast ratio
1200:1 (typ.)
Viewing angle
At the contrast ratio t 10:1
x Horizontal: Right side 88q (typ.), Left side 88q (typ.)
x Vertical: Up side 88q (typ.), Down side 88q (typ.)
Designed viewing direction
Polarizer surface
Viewing angle with optimum grayscale (JDICOM): Normal axis (perpendicular)
Note1
Antiglare
Polarizer pencil-hardness 2H (min.) [by JIS K5600]
Color gamut
At LCD panel center
72 % (typ.)[against NTSC color space]
Response time
Ton+Toff (10%mo 90%)
40 ms (typ.)
Luminance
Signal system
Power supply voltage
At the maximum luminance control
760 cd/m2 (typ.)
2 ports LVDS interface (Characteristics of AC receiver THC63LVD824A THine
Electronics, Inc. or equivalent)
[RGB 8-bit signals, Data enable signal (DE), Dot clock (CLK)]
LCD panel signal processing board: 12.0V
LED driver board: 12.0V
Backlight
LED backlight type with LED driver board
Power consumption
At checkered flag pattern, the maximum luminance control
57 W (typ.)
Note1: When the product luminance is 450cd/m2, the gamma characteristic is designed to JDICOM.
DATA SHEET DOD-PP-1480 (1st edition)
5
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NL160120AC27-32B
4.4 POWER SUPPLY VOLTAGE SEQUENCE
4.4.1 LCD panel signal processing board
VDD
Note1
10.8V
0V
LVDS Signals *1,*2
Note2
0V
ON
0.1ms < Tr < 80ms
OFF
9.6V 10.8V
VDD dip < 20ms
VALID period
ON
10.8V
Toff > 200ms
t > 10ms
t> 10ms
t • 450ms
Display on screen
0ms < t < 35ms
*1: DA0+/-, DA1+/-, DA2+/-, DA3+/-, CKA+/-, DB0+/-, DB1+/-, DB2+/-, DB3+/- and CKB+/-
*2: LVDS signals should be measured at the terminal of 100: resistance.
Note1: If there is a voltage variation (voltage drop) at the rising edge of VDD below 10.8V, there is a
possibility that a product does not work due to a protection circuit.
Note2: LVDS signals must be set to Low or High-impedance, except the VALID period (See above
sequence diagram), in order to avoid the circuitry damage.
If some of signals are cut while this product is working, even if the signal input to it once again,
it might not work normally. If a customer stops the display and function signals, VDD also must
be shut down.
Note3: The backlight should be turned on within the valid period of LVDS signals, in order to avoid
unstable data display.
4.4.2 LED driver board
Voltage
12.0V
VDDB 11.4V
0.1ms < tr d 100 ms
OFF ON
11.4V
0V
0ms < t
Under than 1.2V
Time
BRTC
200ms < t
0ms < t
Note1: The backlight should be turned on within the valid period of LVDS signals, in order to avoid
unstable data display.
Note2: If tr is more than 100 ms, the backlight will be turned off by a protection circuit for LED
driver board.
Note3: When VDDB is 0V or BRTC is Low, PWSEL must be set to Low or Open.
DATA SHEET DOD-PP-1480 (1st edition)
11
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