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PDF LP173WF3-SLB2 Data sheet ( Hoja de datos )

Número de pieza LP173WF3-SLB2
Descripción FHD TFT LCD
Fabricantes LG 
Logotipo LG Logotipo



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No Preview Available ! LP173WF3-SLB2 Hoja de datos, Descripción, Manual

Global LCD Panel Exchange Center
www.panelook.com
Product Specification
SPECIFICATION
FOR
APPROVAL
LP173WF3
Liquid Crystal Display
( ) Preliminary Specification
( ̻ ) Final Specification
Title
BUYER
MODEL
HP
17.3” FHD TFT LCD
SUPPLIER
LG Display Co., Ltd.
*MODEL
LP173WF3
Suffix
SLB2
*When you obtain standard approval,
please use the above model name without suffix
APPROVED BY
/
/
/
SIGNATURE
APPROVED BY
SIGNATURE
S. R. Kim / S.Manager
REVIEWED BY
M. J. Lee / S.Manager
PREPARED BY
S. I. Joo / Engineer
J. P. Lee / Engineer
Please return 1 copy for your confirmation with
your signature and comments.
Products Engineering Dept.
LG Display Co., Ltd
Ver. 1.0
26. Apr. 2011
1 / 34
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LP173WF3-SLB2 pdf
Global LCD Panel Exchange Center
www.panelook.com
Product Specification
LP173WF3
Liquid Crystal Display
2. Absolute Maximum Ratings
The following are maximum values which, if exceeded, may cause faulty operation or damage to the unit.
Table 1. ABSOLUTE MAXIMUM RATINGS
Parameter
Power Input Voltage
Operating Temperature
Storage Temperature
Operating Ambient Humidity
Storage Humidity
Symbol
VCC
TOP
HST
HOP
HST
Values
Min Max
-0.3 4.0
0 50
-20 60
10 90
10 90
Units
Vdc
qC
qC
%RH
%RH
Notes
at 25 r 5qC
1
1
1
1
Note : 1. Temperature and relative humidity range are shown in the figure below.
Wet bulb temperature should be 39qC Max, and no condensation of water.
Note : 2. Storage Condition is guaranteed under packing condition.
90% 80%
60 60%
Wet Bulb
Temperature []
50
40
30
20
10
0
40%
20%
10%
-20 0 10 20 30 40 50 60 70 80
Dry Bulb Temperature []
Storage
Operation
Ver. 1.0
26. Apr. 2011
5 / 34
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LP173WF3-SLB2 arduino
Global LCD Panel Exchange Center
www.panelook.com
Product Specification
LP173WF3
Liquid Crystal Display
3-3. Signal Timing Specifications
This is the signal timing required at the input of the User connector. All of the interface signal timing should be
satisfied with the following specifications and specifications of LVDS Tx/Rx for its proper operation.
Table 5. TIMING TABLE
ITEM
Symbol
Min Typ Max Unit
Note
DCLK
Frequency
fCLK 67.17 69.35
72.65 MHz
LVDS 2 Port
Hsync
Period
Width
tHP 1020
tWH 16
1040
16
1078
16
tCLK
Width-Active
tWHA
960
960
960
Vsync
Period
Width
tVP 1096
tWV 5
1111
5
1122
5
tHP
Width-Active
tWVA
1080
1080
1080
Data
Horizontal back porch
Horizontal front porch
tHBP 34
tHFP 10
40
24
50
tCLK
52
Enable
Vertical back porch
Vertical front porch
tVBP 10
tVFP 1
23
3
28
tHP
9
Appendix) 1) All reliabilities are specified for timing specification based on refresh rate of 60 Hz. Even though actual
performance in 50Hz and 48Hz for low power is displayed normally, remark and inform to user that display quality in
50 Hz and 48 Hz is out of guarantee range.
2) Timing is controlled by EEDID Timing at refresh rate of 60Hz. All display quality is guaranteed based on refresh rate
of 60Hz controlled by EEDID timing.
3-4. Signal Timing Waveforms (Normal status)
Data Enable, Hsync, Vsync
High: 0.7VCC
Low: 0.3VCC
DCLK
tCLK
0.5 Vcc
Condition : VCC =3.3V
Hsync tWH
Data Enable
tHBP
tWV
Vsync
Data Enable
Ver. 1.0
tVBP
tHP
tWHA
tVP
tWVA
26. Apr. 2011
tHFP
tVFP
11 / 34
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