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PDF AS3709 Data sheet ( Hoja de datos )
| Número de pieza | AS3709 | |
| Descripción | uPMIC | |
| Fabricantes | ams | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de AS3709 (archivo pdf) en la parte inferior de esta página. Total 30 Páginas | ||
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AS3709
μPMIC with 5 DCDC and 2 LDOs
General Description
Figure 1:
Added Value of using AS3709
The AS3709 is an ultra compact μPMIC containing 5
high-efficiency, constant-frequency synchronous buck
converters in addition with two universal IO LDOs are available
for lower current power rails. The wide input voltage range (2.7V
to 5.5V), automatic power-save mode and minimal external
component requirements make the AS3709 perfect for any
single Li-Ion battery-powered or fixed 3.3V/5V supply
application. Typical supply current with no load is 110μA and
decreases to ≤ 7μA in shutdown mode. An internal synchronous
switch increases efficiency and eliminates the need for an
external Schottky diode. The internally fixed switching
frequency (2MHz, 3MHz or 4MHz) allows the use of small surface
mount external components. Very low output voltages can be
delivered with the internal 0.6V feedback reference voltage. The
AS3709 is available in a 32-pin QFN 4x4mm package and in a
very compact CSP36 with 0.4mm pitch.
For further understanding in regards to the contents of the
datasheet, please refer to the Reference Guide located at the end
of the document.
Key Benefits & Features
The benefits and features of AS3709, μPMIC with 5 DCDC and 2
LDOs are listed below:
Benefits
Features
Compact design due to small coils for IO and memory
voltage generation
5 DCDC step down regulators (2-4MHz)
Independent voltage rails for general purpose IO
supplies
2 universal IO LDOs
Flexible and fast adaptation to different
processors/applications
OTP programmable Boot and Power-down sequence
Power saving control according to the processor‘s
needs.
Stand-by function with programmable sequence and
voltages
Self-contained start-up and control for single-cell
battery applications.
Safety shutdown feature.
Control Interface
I²C/SPI control lines
ON key with 4/8s emergency shut-down
POR with RESET I/O
Dedicated packages for specific applications.
Optimization for PCB cost or size.
32-pin QFN (4x4mm), 0.4mm pitch
36-ball WL-CSP 0.4mm pitch
ams Datasheet, Confidential: 2013-Aug [1-02]
AS3709 – 1
1 page  
Pin Assignment
Pin Number
QFN WLP
Pin Name
Pin Type
Description
28 A3 GPIO2
ANA IO
General Purpose IO 2
29 C4 GPIO1
ANA IO
General Purpose IO 1
30 A4 VSSA
GND GND Reference for analog blocks
31 B4 FB_SD5
ANA IN
DCDC SD5 Feedback pin
32 A5 PVSS_SD5 GND
DCDC SD5 neg supply terminal
33 VSS GND Exposed Pad
If not Used
Open
Open
Always needed
Open
Always needed
Always needed
ams Datasheet, Confidential: 2013-Aug [1-02]
AS3709 – 5
5 Page 
Detailed Description - Power Management Functions
DC/DC buck burst mode: Shows the
DC/DC switching waveforms for high
efficiency operation
necessary at low output loads, and therefore the efficiency
increases. As drawback, this mode increases the ripple up to a
higher output current.
The crossover point to low power mode is already reached at
reasonable high output currents. (e.g. @110mA for VIN = 3V,
VOUT = 1.2V, 1μH, 4MHz)
Figure 10:
DC/DC Buck High Efficiency Mode
coil current (200mA/div)
LX (2V/div)
VOUT (50mV/div)
time (20us/div)
Low Power Mode Operation (Automatically Controlled)
As soon as the output voltage stays above the desired target
value for a certain time, some internal blocks will be powered
down leaving the output floating to lower the power
consumption. Normal operation starts as soon as the output
drops below the target value for a similar amount of time. To
minimize the accuracy error some internal circuits are kept
powered to assure a minimized output voltage ripple.
Two addition guard bands, based on comparators, are set at
±5% of the target value to react quickly on large
over/undershoots by immediately turning on the output
drivers without the normal time delays. This ensures a
minimized ripple also in very extreme load conditions.
DVM (Dynamic Voltage Management)
To minimize the over-/undershoot during a change of the
output voltage, the DVM can be enabled. With DVM the output
voltage will ramp up/down with a selectable slope after the new
value was written to the registers. Without DVM the slew rate
of the output voltage is only determined by external
components like the coil and load capacitor as well as the load
current.
DVM can be selected for all step-down converters, but only for
one at a time. (see sd_dvm_select and dvm_time description)
ams Datasheet, Confidential: 2013-Aug [1-02]
AS3709 – 11
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet AS3709.PDF ] | |
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