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PDF AS5013 Data sheet ( Hoja de datos )
| Número de pieza | AS5013 | |
| Descripción | Low Power Integrated Hall IC | |
| Fabricantes | ams | |
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AS5013
Low Power Integrated Hall IC for Human Interface Applications
1 General Description
The AS5013 is a complete Hall Sensor IC for smart navigation key
applications to meet the low power requirements and host SW
integration challenges for products such as cell phones and smart
handheld devices.
Due to the on chip processing engine, system designers are not
tasked with integrating complex SW algorithms on their host
processor thus leading to rapid development cycles.
The AS5013 single-chip IC includes 5 integrated Hall sensing
elements for detecting up to ±2mm lateral displacement, high
resolution ADC, XY coordinate and motion detection engine
combined with a smart power management controller.
The X and Y positions coordinates and magnetic field information for
each Hall sensor element is transmitted over a 2-wire I²C compliant
interface to the host processor.
The AS5013 is available in a small 16-pin 4x4x0.55mm QFN
package and specified over an operating temperature of
-20ºC to +80ºC.
Figure 1. AS5013 Block Diagram
2 Key Features
2.7V to 3.6V operating voltage
Down to 1.7V peripheral supply voltage
Two operating modes:
- Idle mode
- Low power mode
Less than 3µA current consumption in Idle mode
Low power mode with selectable readout rate
Two interrupt modes
- Motion detect
- Data ready
Lateral magnet movement radius up to 2mm
High-speed I²C interface
3 Applications
The AS5013 is ideal for small form-factor manual input devices in
battery operated equipment, such as Mobile phones, MP3 players,
PDAs, GPS receivers and Gaming consoles.
C2 C1
C5
C3 C4
Hall Sensors
Power
Management
VSS
AS5013
ADC
VDD
Processing
Engine
Clock
Generator
I² C
Interface
ADDR SDA SCL
RESETn
INTn
VDDp
www.ams.com/AS5013
Revision 1.15
1 - 33
1 page  
AS5013
Datasheet - Electrical Characteristics
6 Electrical Characteristics
6.1 Operating Conditions
TAMB = -20°C to +80°C, VDD = 3.3V, RESETn = HIGH
Table 3. Operating Conditions
Symbol
Parameter
Conditions
VDD Core supply voltage
VDDp
Peripheral supply voltage
Input: RESETn
Open drain outputs: SCL, SDA, INTn.
External I2C pull up resistor to be connected
to VDDp.
Maximal average current consumption
IDDs on VDD, Pulsed peaks = IDDf
depends on the sampling time ts[ms]
TAMB = -20ºC to +50ºC
TAMB = 50ºC to +80ºC
IDDI
Current consumption on core supply,
Idle mode, no readout (ts = infinite)
TAMB = -20ºC to +50ºC
TAMB = 50ºC to +80ºC
Current consumption on core supply,
IDDf Idle mode, continuous readout
(ts=450µs)
Continuous current pin VDD
Maximum sampling ts = 450µs
Tpua Power up time analog
Step on VDD to Data_Ready
Tconv
Conversion time
Read X/Y coordinate I²C Y_res_int ACK bit
of to Data_Ready
tP,W Nominal wakeup time
dx
dy
Lateral movement radius
The range depends on the magnet and the
distance to the surface, dx²+dy² <= 4mm
d Type of magnet
Cylindrical; axial magnetized
RH Hall array diameter
BZ
Magnetic field strength
Vertical magnetic field at magnet center;
measured at chip surface
TAMB
Ambient temperature range
Resolution of XY displacement
Over 2*dx and 2*dy axis
Noise (RMS)
C1..C5 channel data (result from two
measurement – positive and negative
current spinning)
PSSR
Power Supply Rejection Ratio
VDD=3.3V;
Temp = 25°C
dVDD= 100 mVpp at 10.30 kHz
IC package
Power supply filtering capacitors
Ceramic capacitor VDD - VSS
Ceramic capacitor VDDp - VSS
Min Typ Max
2.7 3.6
1.7 VDD
3+3760/ts [ms]
10+3760/ts [ms]
3
10
10
1000
450
20 320
2
23
2.2
30 120
-20 +80
8
100
0.2
QFN16 4x4x0.55mm
100
100
Units
V
V
µA
µA
mA
µs
µs
ms
mm
mm
mm
mT
°C
bit
µT
%/
100mV
nF
nF
www.ams.com/AS5013
Revision 1.15
5 - 33
5 Page 
AS5013
Datasheet - Detailed Description
7.5.2 I²C Electrical Specification
Standard-mode, Fast-mode, High Speed-mode
Symbol
VIL
VIH
Vhys
VOL
IOL
ICS
Parameter
LOW-level input voltage
HIGH-level input voltage
Hysteresis of Schmitt Trigger inputs
LOW-level output voltage (open-drain or
open-collector) at 3mA sink current
LOW-level output current
Pull-up current of SCLH current source
tSP
Pulse width of spikes that must be
suppressed by the input filter
Ii Input current at each I/O Pin
CB Total capacitive load for each bus line
CI/O I/O capacitance (SDA, SCL)
Condition
VDDp < 2V
VDDp < 2V
VOL = 0.4V
SCLH output levels between
0.3VDDp and 0.7VDDp
In HS-mode
In Fast-mode
Input voltage
between 0.1VDDp and 0.9VDDp
Min
-0.5
0.7VDDp
0.1VDDp
-
-
3
-
-
-
Max
0.3VDDp
VDDp + 0.5
(see note 1)
0.2VDDp
-
12
10
(see note 2)
50
(see note 2)
10
(see note 3)
400
10
Unit
V
V
V
V
mA
mA
ns
ns
µA
pF
pF
Notes:
1. Maximum VIH = VDDpmax +0.5V or 5.5V, which ever is lower.
2. Input filters on the SDA and SCL inputs suppress noise spikes of less than 50ns in Fast-mode and 10ns in HS-mode.
3. I/O pins of Fast-mode and Fast-mode plus devices must not obstruct the SDA and SCL lines if VDDp is switched off.
7.5.3 I²C Timing
Symbol
Parameter
Condition
fSCLK
tBUF
tHD;STA
tLOW
tHIGH
tSU;STA
tHD;DAT
tSU;DAT
trCL
SCL clock Frequency
Bus Free Time; time
between STOP and
START Condition
Hold Time; (Repeated)
START Condition2
LOW Period of SCL Clock
HIGH Period of SCL Clock
Setup Time for a
Repeated START
condition
Data Hold Time3
Data Setup Time4
Rise time of SCLH signal
External pull-up
source of 3mA
Fast-mode
Min Max
- 400
HS-mode CB=100pF
Min Max
- 3400
HS-mode
CB=400pF1
Min Max
- 1700
500 - 500 - 500 -
600 - 160 - 160 -
1300 - 160 - 320 -
600 - 60 - 120 -
600 - 160 - 160 -
0 900 0 70 0 150
100 - 10 - 10 -
- - 10 40 20 80
Unit
kHz
ns
ns
ns
ns
ns
ns
ns
ns
www.ams.com/AS5013
Revision 1.15
11 - 33
11 Page | ||
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| PDF Descargar | [ Datasheet AS5013.PDF ] | |
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