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PDF AS1121 Data sheet ( Hoja de datos )
| Número de pieza | AS1121 | |
| Descripción | 16-Channel LED Driver | |
| Fabricantes | austriamicrosystems AG | |
| Logotipo |  |
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Datasheet
AS1121
16-Channel LED Driver with Dot Correction and Greyscale PWM
1 General Description
The AS1121 is a 16-channel, constant current-sink LED driver. Each
of the 16 channels can be individually adjusted by 4096-step grey-
scale PWM brightness control and 64-step constant-current sink (dot
correction).
The dot correction circuitry adjusts the brightness variations between
the AS1121 channels and other LED drivers. Greyscale control and
dot correction circuitry are accessible via the SPI-compatible serial
interface. A single external resistor sets the maximum current value
of all 16 channels.
The open LED detection function indicates a broken or disconnected
LED at one or more of the outputs. The overtemperature protection-
flag indicates that the device is in an overtemperature condition.
An additional power-down pin puts the AS1121 into a 40nA standby-
mode.
The AS1121 is available in a 32-pin TQFN 5x5 mm package.
2 Key Features
Greyscale PWM Control: 12-Bit (4096 Steps)
Dot Correction: 6-Bit (64 Steps)
Drive Capability (Constant-Current Sink): 0 to 40mA
LED Power Supply Voltage: up to 30V
Supply Voltage Range: 3.1V to 3.6V
SPI-Compatible Serial Interface
Output Delay for controlled Inrush Current (factory set, can be
turned off)
Factory set rise- and fall-time for EMI improvement
PWM Clock Rate: up to 10 MHz
Data Transfer Clock Rate: up to 30 MHz
CMOS Level I/O
Diagnostic Features
32-pin TQFN 5x5 mm Package
3 Applications
Figure 1. AS1121 - Block Diagram
The device is ideal for mono-, multi-, and full-color LED displays,
LED signboards, and display backlights.
1 CLK 2 SDI
32 LD
29 PD
26
IREF
24
GSCLK
31
OEN
3
MODE
27
VCC
Max OUTn VREF =
Current 1.24V
Greyscale
Counter
Control
Status
Open LED Detect,
Overtemperature,
Dot Correction
Data
Over-
temp
Open
LED
Detect
22
XERR
30
GND
AS1121
Input
Shift
Register
Input
Shift
Register
Control
Greyscale
0 Register 11
12-Bit Greyscale
PWM Control
Dot Correction
0 Register 5
6-Bit Dot
Correction
Open&Short LED Detection
Control
Greyscale
12 Register 23
12-Bit Greyscale
PWM Control
Dot Correction
6-Bit Dot
6 Register 11
Correction
. Open&Short LED Detection
.
. Control
Greyscale
180 Register191
12-Bit Greyscale
PWM Control
Dot Correction
90 Register 95
6-Bit Dot
Correction
Open&Short LED Detection
Constant Current
Driver
Delay
Constant Current
Driver
Delay
Constant Current
Driver
Delay
4
OUT0
5
OUT1
.
.
.
21
OUT15
23
SDO
www.austriamicrosystems.com/AS1121
Revision 1.01
1 - 21
1 page  
AS1121
Datasheet - Electrical Characteristics
Table 3. Electrical Characteristics (Continued)
Symbol
Parameter
IOL
VLOD
Low-Level Output Current
LED Open Detection Threshold
VIREF
Reference Voltage Output
Thermal Protection
TTWF
Thermal Warn Flag Threshold
TTEF
Thermal Error Flag Threshold
Condition
VCC = 5 V at SDO, XERR
RIREF = 1kΩ
Min Typ Max Unit
1.0 mA
0.3 0.4 V
1.23 1.27 1.32
V
125 ºC
150 ºC
Timing Characteristics
VCC = +3.1V to +3.6V, TAMB = -40°C to +85ºC. Typical values are at TAMB = +25°C, VCC = 3.3V (unless otherwise specified).
Table 4. Output Tming Characteristics
Symbol
Parameter
Conditions
Min Typ Max
tR0
tR1 1
tF0
tF11
tPD0
Rise Time
Fall Time
SDO
OUTn, DC = 3FHEX, RIREF = 1kΩ
SDO
OUTn, DC = 3FHEX, RIREF = 1kΩ
CLK, SDO 2
8
25
8
25
tPD1
Propagation Delay Time
OUT0, OUT1, OUT2, OUT3 2, RIREF = 1kΩ,
turn ON delay
15
tPD2
OUT0, OUT1, OUT2, OUT3 2, RIREF = 1kΩ,
turn OFF delay
tD
Average Output Delay Time
(can be turend off on request)
OUT4, OUT5, OUT6, OUT7 2
OUT8, OUT9, OUT10, OUT11 2
OUT12, OUT13, OUT14, OUT15 2
25
1. Value can be factory trimmed for EMI improvement
2. See Figure 24 on page 16.
Unit
ns
ns
ns
ns
Interface Characteristics
VCC = +3.1V to +3.6V, TAMB = -40°C to +85ºC. Typical values are at TAMB = +25°C, VCC = 3.3V (unless otherwise specified).
Table 5. Serial Interface Timing Characteristics
Symbol
Parameter
Conditions
Min Typ Max
fCLK Data Shift Clock Frequency
CLK
30
fGSCLK
Greyscale Clock Frequency
GSCLK
5
tWH0/tWL0
CLK Pulse Duration
CLK = 1/0 1
16
tWH1/tWL1
GSCLK Pulse Duration
GSCLK = 1/0 2
tbd
tWH2
LD Pulse Duration
LD = 1 1
20
tWH3
OEN Pulse Duration
OEN = 1 2
20
Unit
MHz
MHz
ns
ns
ns
ns
www.austriamicrosystems.com/AS1121
Revision 1.01
5 - 21
5 Page 
AS1121
Datasheet - Detailed Description
Table 6. XERR Truth Table
Error Condition
Temp. OUTn Voltage
O TJ < TTEF
p
e
n TJ > TTEF
T TJ > TTEF
e TJ < TTEF
m
p
TJ > TTWF
TJ < TTWF
OUTn > VLOD
OUTn < VLOD
OUTn > VLOD
OUTn < VLOD
Don't Care
Don't Care
Don't Care
Don't Care
Error Information
Thermal
Error Flag
Thermal
Warning
Flag
Open LED
Detect
0 Don't Care 0
0 Don't Care 1
1 Don't Care 0
1 Don't Care 1
0
1
Don't Care
Don't Care
Don't Care
Don't Care
0
1
Don't Care
Don't Care
Don't Care
Don't Care
Selected Mode
Status
OEN Mode XERR
00 1
normal
0 0 0 open error
0 0 0 temp. error
0
0
0
open & temp.
error
10 1
normal
1 0 0 temp error
11 1
normal
1 1 0 temp. warn
Overtemperature Error/Warning Flags
The AS1121 provides a overtemperature circuit to indicate that the device is in an overtemperature condition. If the device junction temperature
(TJ) exceeds the threshold temperature (150°C typ), the overtemperature circuit trips and pulls XERR to ground. The overtemperature flag sta-
tus can be read out from the AS1121 status register.
To prevent an overtemperature condition the AS1121 offers an temperature warning flag at 125°C typical. This flag can be used to take precau-
tions (e.g. start an external cooling) against a overtemperature condition.
Open LED Detection
The AS1121 integrated open LED detection circuit reports an error if any of the 16 LEDs is open or disconnected from the circuit. The open LED
detection circuit trips when the error detection is activated and the voltage at OUTn is less than VLOD.
Note: The voltage at each OUTn is sampled 1 µs after being switched on. Please refer to Figure 18 on page 11.
The open LED detection circuit also pulls XERR to GND when tripped. The open LED status of each channel can also be read out from the
AS1121 status information data (SID) during a greyscale data input cycle.
Figure 18. Error Detection Timing (GS=FFFFHEX, DC=3FHEX)
LD
OEN
tERR
GSCLK
SID
LODn
LODn+1
Error
Detection
Start
Error
Detection
End
Note: The rising edge of LD latches new data into the internal registers depending on the logic level of the pin MODE. If the pin MODE is tied
GND, the greyscale registers are updated. If the pin MODE is tied to VCC, the dot correction registers are updated.
www.austriamicrosystems.com/AS1121
Revision 1.01
11 - 21
11 Page | ||
| Páginas | Total 21 Páginas | |
| PDF Descargar | [ Datasheet AS1121.PDF ] | |
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