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PDF AS3501 Data sheet ( Hoja de datos )

Número de pieza AS3501
Descripción Low Power Ambient Noise-Cancelling Speaker Driver
Fabricantes austriamicrosystems AG 
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AS3501 AS3502
Data Sheet
Low Power Ambient Noise-Cancelling Speaker Driver
1 General Description
The AS3501/02 are speaker driver with Ambient Noise
Cancelling function for headsets, headphones or ear
pieces. It is intended to improve quality of e.g. music lis-
tening, a phone conversation etc. by reducing back-
ground ambient noise.
The fully analog implementation allows the lowest power
consumption, lowest system BOM cost and most natural
received voice enhancement otherwise difficult to
achieve with DSP implementations. The device is
designed to be easily applied to existing architectures.
An internal OTP-ROM can be optionally used to store
the microphones gain calibration settings.
The AS3501/02 can be used in different configurations
for best trade-off of noise cancellation, required filtering
functions and mechanical designs.
The simpler feed-forward topology is used to effectively
reduce low frequency background noise. The feed-back
topology with either 1 or 2 filtering stages can be used to
reduce noise for a larger frequency range, and to even
implement transfer functions like speaker equalization,
Baxandall equalization, high/low shelving filter and to set
a predefined loop bandwidth.
The filter loop is optimized by the user for specific head-
set electrical and mechanical designs by dimensioning
simple R, C components.
Most headset implementations will make use of a single
noise detecting microphone. Two microphones could be
used to allow for increased flexibility of their location in
the headset mechanical design. Using the bridged mode
allows to even drive high impedance headsets.
2 Key Features
Microphone Input
128 gain steps @0.375dB and MUTE with AGC
differential, low noise microphone amplifier
single ended or differential mode
supply for electret microphone
MIC gain OTP programmable
High Efficiency Headphone Amplifier
2x34mW, 0.1% THD @ 16, 1.5V supply,
100dB SNR
bridged mode for e.g. 300loads
click and pop less start-up and mode switching
Line Input
volume control via serial interface or volume pin
64 steps @ 0.75dB and MUTE, pop-free gain setting
single ended stereo or mono differential mode
ANC processing
feed-forward cancellation
feed-back cancellation with filter loop transfer func-
tion definable via simple RC components
simple in production SW calibration
12-30dB noise reduction (headset dependent)
10-2000Hz wide frequency active noise attenuation
(headset dependent)
Monitor Function
for assisted hearing, i.e. to monitor announcements
fixed (OTP prog.) ambient sound amplification to
compensate headphone passive attenuation
volume controlled ambient sound amplification
mixed with fixed (OTP prog.) attenuation of LineIn
Incremental Functions
ANC with or without music on the receiving path
improved dynamic range playback
simple and low cost single noise detection micro-
phone implementation
OTP ROM for automatic trimming during production
Performance Parameter
5/3.8mA @ 1.5V stereo/mono ANC; <1uA quiescent
extended PSRR for 217Hz
Interfaces
2 wire serial control mode & volume inputs
calibration via Line-In or 2-wire serial interface
single cell or fixed 1.0-1.8V supply with internal CP
Package
AS3501 QFN24 [4x4mm] 0.5mm pitch
AS3502 QFN32 [5.x5mm] 0.5mm pitch
3 Applications
Ear pieces, Headsets, Hands-Free Kits, Mobile Phones,
Voice Communicating Devices
www.austriamicrosystems.com
Revision 1.13
1 - 45

1 page




AS3501 pdf
AS3501 AS3502 1v2
Data Sheet
4.2 Pin Description
Please observe that pin description may change in preliminary data sheets.
Table 1. Pin Description for AS3501 AS3502
AS3501 AS3502 Pin Name
Type
Description
24 1
IOP1L
ANA IN Filter OpAmp1 Input Left Channel
- 2 QLINL ANA OUT Line In Gain Stage Output Left Channel
1 3 QMICL ANA OUT MIC Gain Stage Output Right Channel
2
4
AGND
ANA IN Analog Reference
35
46
LINL
LINR
ANA IN
DIG IN
ANA IN
DIG IO
Line In Left Channel
During Application Trim Mode Write – CSDA
During Application Trim Mode Burn - VNEG
LineIn Right Channel
During Application Trim Mode Write – CSCL
During Application Trim Mode Burn - Clock
Serial Interface Data
5 7 VOL_CSDA MIXED IO ADC Input for volume regulation
Mode Pin (Power Up/Down, Monitor)
6 8 MODE_CSCL DIG IN Serial Interface Clock
79
MICL
ANA IN Microphone In Left Channel
8 10
ILED
ANA OUT Current Output for on-indication LED
9 11
MICS
ANA OUT Microphone Supply
10 12
MICR
ANA IN Microphone Input Right Channel
11 13 QMICR ANA OUT MIC Gain Stage Output Right Channel
- 14 QLINR ANA OUT Line In Gain Stage Output Right Channel
12 15
IOP1R
ANA IN FilterOpAmp1 Input Right Channel
13
16
QOP1R
ANA IN Filter OpAmp1 Output Right Channel
-
17
IOP2R
ANA IN Filter OpAmp2 Input Right Channel
- 18 QOP2R ANA OUT Filter OpAmp2 Output Right Channel
14 19
VSS
SUP IN Core and Periphery Circuit VSS Supply
15 20
HPL
ANA OUT Headphone Output Left Channel
-
21
HPVSS
SUP IN Headphone VSS Supply
16 22
HPR
ANA OUT Headphone Output Right Channel
17
23
HPVDD
SUP IN Headphone VDD Supply
18 24
VBAT
SUP IN VNEG ChargePump Positive Supply
- 25
n.c.
-
19 26
CPP
ANA OUT VNEG ChargePump Flying Capacitor Positive Terminal
20 27
GND
GND VNEG ChargePump Negative Supply
21 28
CPN
ANA OUT VNEG ChargePump Flying Capacitor Negative Terminal
22 29
VNEG
SUP IO VNEG ChargePump Output
- 30 QOP2L ANA OUT Filter OpAmp2 Output Left Channel
-
31
IOP2L
ANA IN Filter OpAmp2 Input Left Channel
23 32 QOP1L ANA OUT Filter OpAmp1 Output Right Channel
25 33
Exposed Pad: connect to VNEG or leave it unconnected
www.austriamicrosystems.com
Revision 1.13
5 - 45

5 Page





AS3501 arduino
AS3501 AS3502 1v2
Data Sheet
Figure 8. THD+N and Output Power(20mW) versus
Frequency with 32load
0,1
Left
Right
30
25
20
0,01
15
10
5
0,001
10
100 1000
f [Hz]
10000
0
Figure 9. THD+N and Output Power(30mW) versus
Frequency with 16load
0,1
Left
Right
40
35
30
25
0,01
20
15
10
5
0,001
10
100 1000
f [Hz]
10000
0
Figure 10. THD+N and Output Power(10mW) versus
Frequency with 32load
0,1
Left
Right
14
12
10
0,01
8
6
4
2
0,001
10
100 1000
f [Hz]
10000
0
Figure 11. THD+N and Output Power(10mW) versus
Frequency with 16load
0,1
Left
Right
12
10
8
0,01
6
4
2
0,001
10
100 1000
f [Hz]
10000
0
Figure 12. THD+N and Output Power(1mW) versus
Frequency with 32load
0,1 1,2
Figure 13. THD+N and Output Power(1mW) versus
Frequency with 16load
0,1 1,2
11
0,8 0,8
0,01
0,6 0,01
0,6
0,4 0,4
0,001
10
100 1000
f [Hz]
www.austriamicrosystems.com
Left
Right
10000
0,2
0
0,001
10
Revision 1.13
100 1000
f [Hz]
Left
Right
10000
0,2
0
11 - 45

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