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SGN01G64C1CQ1SA-DCRT PDF даташит

Спецификация SGN01G64C1CQ1SA-DCRT изготовлена ​​​​«Swissbit» и имеет функцию, называемую «204 Pin SO-DIMM».

Детали детали

Номер произв SGN01G64C1CQ1SA-DCRT
Описание 204 Pin SO-DIMM
Производители Swissbit
логотип Swissbit логотип 

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SGN01G64C1CQ1SA-DCRT Даташит, Описание, Даташиты
Data Sheet
Rev.1.0 18.02.2014
1024MB DDR3 SDRAM SO-DIMM
204 Pin SO-DIMM
Features:
SGN01G64C1CQ1SA-XX[E/W]RT
204-pin 64-bit DDR3 Small Outline Dual-In-Line Double
1GByte in FBGA Technology
Data Rate Synchronous DRAM module
Module organization: single rank 128M x 64
RoHS compliant
VDD = 1.5V ±0.075V, VDDQ 1.5V ±0.075V
1.5V I/O ( SSTL_15 compatible)
Options:
Fly-by-bus with termination for C/A & CLK bus
On-board I2C temperature sensor with integrated serial
presence-detect (SPD) EEPROM
Data Rate / Latency
DDR3 1333 MT/s CL9
Marking
-CC
Gold-contact pads
This module is fully pin and functional compatible to the
DDR3 1600 MT/s CL11
-DC
JEDEC PC3-12800 spec. and JEDEC- Standard MO-268.
Module Density
1GByte with 4 dies and 1 rank
(see www.jedec.org)
The pcb and all components are manufactured according
to the RoHS compliance specification [EU Directive
Standard Grade
Grade E
Grade W
(TA) 0°C to 70°C
(TC) 0°C to 85°C
(TA)
(TC)
(TA)
(TC)
0°C to 85°C
0°C to 95°C *)
-40°C to 85°C
-40°C to 95°C *)
2002/95/EC Restriction of Hazardous Substances (RoHS)]
DDR3 - SDRAM component Samsung K4B2G1646Q
128Mx16 DDR3 SDRAM in PG-TFBGA-96 package
8-bit pre-fetch architecture
Programmable CAS Latency, CAS Write Latency, Additive
Latency, Burst Length and Burst Type.
On-Die-Termination (ODT) and Dynamic ODT for improved
*) The refresh rate has to be doubled when 85°C<TC<95°C*) The refsreigsnharal tientheagsrittoy.be doubled when 85°C<TC<95°C
Refresh. Self Refresh and Power Down Modes.
Environmental Requirements:
ZQ Calibration for output driver and ODT.
System Level Timing Calibration Support via Write Leveling
Operating temperature (ambient)
Standard Grade
0°C to 70°C
Grade E
0°C to 85°C
Grade W
Operating Humidity
-40°C to 85°C
10% to 90% relative humidity, noncondensing
Operating Pressure
105 to 69 kPa (up to 10000 ft.)
Storage Temperature
-55°C to 100°C
Storage Humidity
5% to 95% relative humidity, noncondensing
Storage Pressure
1682 PSI (up to 5000 ft.) at 50°C
and Multi Purpose Register (MPR) Read Pattern.
Figure: mechanical dimensions1
Swissbit AG
Industriestrasse 4
CH 9552 Bronschhofen
Fon: +41 (0) 71 913 03 03
Fax: +41 (0) 71 913 03 15
1if no tolerances specified ± 0.15mm
www.swissbit.com
Page 1
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SGN01G64C1CQ1SA-DCRT Даташит, Описание, Даташиты
Data Sheet
Rev.1.0 18.02.2014
This Swissbit module is an industry standard 204-pin 8-byte DDR3 SDRAM Small Outline Dual-In-line Memory
Module (SO-DIMM) which is organized as x64 high speed CMOS memory arrays. The module uses internally
configured octal-bank DDR3 SDRAM devices. The module uses double data rate architecture to achieve high-
speed operation. DDR3 SDRAM modules operate from a differential clock (CK and CK#). READ and WRITE
accesses to a DDR3 SDRAM module is burst-oriented; accesses start at a selected location and continue for a
programmed number of locations in a programmed sequence. The burst length is either four or eight locations. An
auto precharge function can be enabled to provide a self-timed row precharge that is initiated at the end of a burst
access. The DDR3 SDRAM devices have a multibank architecture which allows a concurrent operation that is
providing a high effective bandwidth. A self refresh mode is provided and a power-saving “power-down” mode. All
inputs and all full drive-strength outputs are SSTL_15 compatible.
The DDR3 SDRAM module uses the serial presence detect (SPD) function implemented via serial EEPROM
using the standard I2C protocol. This nonvolatile storage device contains 256 bytes. The first 128 bytes are
utilized by the SO-DIMM manufacturer (Swissbit) to identify the module type, the module’s organization and
several timing parameters. The second 128 bytes are available to the end user.
Module Configuration
Organization
128M x 64bit
DDR3 SDRAMs used
4 x 128M x 16bit (2Gbit)
Row
Addr.
13
Device Bank
Addr.
BA0, BA1, BA2
Column
Addr.
Refresh
Module
Bank Select
10 8k
S0#
Module Dimensions
in mm
67.60 (long) x 30(high) x 3.80 [max] (thickness)
Timing Parameters
Part Number
Module Density Transfer Rate Clock Cycle/Data bit rate
SGN01G64C1CQ1SA-CC[E/W]RT
1GByte
10.6 GB/s
1.5ns / 1333MT/s
SGN01G64C1CQ1SA-DC[E/W]RT
1GByte
12.8 GB/s
1.25ns / 1600MT/s
Latency
9-9-9
11-11-11
Pin Name
A0 A9, A11 A12
A10/AP
BA0 BA2
DQ0 DQ63
DM0 DM7
DQS0 DQS7
DQS0# DQS7#
S0#
RAS#
CAS#
WE#
CKE
ODT0
CK0
CK0#
VDD
Swissbit AG
Industriestrasse 4
CH 9552 Bronschhofen
Address Inputs
Address Input / Autoprecharge Bit
Bank Address Inputs
Data Input / Output
Input Data Mask
Data Strobe, positive line
Data Strobe, negative line (only used when differential data strobe mode is enabled)
Chip Select
Row Address Strobe
Column Address Strobe
Write Enable
Clock Enable
On-Die Termination
Clock Inputs, positive line
Clock Inputs, negative line
Supply Voltage (1.5V± 0.075V)
Fon: +41 (0) 71 913 03 03
Fax: +41 (0) 71 913 03 15
www.swissbit.com
Page 2
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SGN01G64C1CQ1SA-DCRT Даташит, Описание, Даташиты
Data Sheet
Rev.1.0 18.02.2014
VREFDQ
VREFCA
VSS
VTT
VDDSPD
SCL
SDA
SA0 SA1
Event#
NC
Reference voltage: DQ, DM (VDD/2)
Reference voltage: Control, command, and address (VDD/2)
Ground
Termination voltage: Used for control, command, and address (VDD/2).
Serial EEPROM Positive Power Supply
Serial Clock for Presence Detect
Serial Data Out for Presence Detect
Presence Detect Address Inputs
Temperature event: The EVENT# pin is asserted by the temperature sensor when critical
No Connection
Pin Configuration
Frontside
PIN#
Symbol
PIN#
Symbol
PIN#
Symbol
1
VREFDQ
53
DQ19 103 CK0#
3 VSS 55 VSS 105 VDD
5
DQ0
57
DQ24
107 A10/AP
7
DQ1
59
DQ25
109
BA0
9 VSS 61 VSS 111 VDD
11 DM0 63 DM3 113 WE#
13 VSS 65 VSS 115 CAS#
15
DQ2
67
DQ26
117
VDD
17
DQ3
69
DQ27
119 NC (A13)
19 VSS 71 VSS 121 NC (S1#)
21 DQ8
KEY
123 VDD
23
DQ9
73
CKE0
125 NC (TEST)
25 VSS 75 VDD 127 VSS
27 DQS1# 77
NC 129 DQ32
29 DQS1 79
BA2 131 DQ33
31 VSS 81 VDD 133 VSS
33
DQ10
83
A12/BC#
135
DQS4#
35 DQ11 85
A9 137 DQS4
37 VSS 87 VDD 139 VSS
39 DQ16 89
A8 141 DQ34
41 DQ17 91
A5 143 DQ35
43 VSS 93 VDD 145 VSS
45 DQS2# 95
A3 147 DQ40
47 DQS2 97
A1 149 DQ41
49 VSS 99 VDD 151 VSS
51
DQ18
101
CK0
153
DM5
(Sig): Signal in brackets may be routed to the socket connector, but is not used on the module
PIN#
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199
201
203
Symbol
VSS
DQ42
DQ43
VSS
DQ48
DQ49
VSS
DQS6#
DQS6
VSS
DQ50
DQ51
VSS
DQ56
DQ57
VSS
DM7
VSS
DQ58
DQ59
VSS
SA0
VDDSPD
SA1
VTT
Swissbit AG
Industriestrasse 4
CH 9552 Bronschhofen
Fon: +41 (0) 71 913 03 03
Fax: +41 (0) 71 913 03 15
www.swissbit.com
Page 3
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