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PDF Si3500 Data sheet ( Hoja de datos )
| Número de pieza | Si3500 | |
| Descripción | 50V INPUT DC TO DC CONVERTER | |
| Fabricantes | Silicon Laboratories | |
| Logotipo |  |
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Si3500
50 V INPUT DC TO DC CONVERTER
Features
Integrated switching regulator Supports non-isolated and
controller with on-chip power FET isolated switching topologies
Input range 42 to 57 V
Output can be set from 1.8 to
12 V
Output power up to 10 W
Highly-integrated IC enables
compact solution footprints
Comprehensive protection
circuitry
Transient overvoltage protection
Undervoltage lockout
Thermal shutdown protection
Short circuit protection
50% duty cycle limiting
Minimal external components Low-profile, 5x5 mm, 20-pin QFN
Integrated transient surge
RoHS-compliant
suppressor
Integrated dual current-limited
hotswap switch
Integrated switching power FET
Applications
3.3 V power supply generation Internet appliances
for Power over Ethernet Power Network devices
Sourcing supply, such as Si3452
Description
The Si3500 is a highly-integrated, high-voltage (42 to 57 V) input dc-to-dc
converter with integrated PWM control and power FET. The output can be
adjusted for various applications in the range of 1.8 to 12 VDC.
The integrated hot swap switch provides a 2-level current limit for slow
charging of the input filter capacitor followed by overcurrent protection at
400 mA.
The hot swap switch overcurrent protection fully protects the Si3500 from
short-circuit damage as long as the inductor does not saturate. For
situations where it is desirable to use a smaller inductor, it is possible to
reduce the overcurrent protection with the addition of one low-cost
transistor.
The Si3500 can be configured to provide an isolated output voltage or a
non-isolated output that is positive or negative with respect to the positive
input rail.
Input undervoltage and overvoltage lockout functions are fully-integrated.
A 65 V input clamp is also integrated. Output voltage softstart is enabled
by just one capacitor to control the output rise time at startup.
Ordering Information:
See Ordering Guide on page
page 14.
Pin Assignments
5 x 5 mm QFN
(Top View)
20 19 18 17 16 15
EROUT 1
SSFT 2
VDD 3
ISOSSFT 4
VNEG
(PAD)
14 NC
13 NC
12 VPOSF
11 NC
5 6 7 8 9 10
Rev. 1.2 1/15
Copyright © 2015 by Silicon Laboratories
Si3500
1 page  
Si3500
Table 3. Absolute Maximum Ratings (Transient)1
Type
Description
Rating
Unit
Voltage
VPOS2
–0.7 to 80
V
HSO
–0.7 to 80
V
VSS1, VSS2, or VSSA
–0.7 to 80
V
Current
SWO
VPOS2
–0.7 to 80
–5 to 5
V
A
Notes:
1. Unless otherwise noted, all voltages referenced to VNEG. Permanent device damage may occur if the maximum ratings
are exceeded. Functional operation should be restricted to those conditions specified in the operational sections of this
data sheet. Exposure to absolute maximum rating conditions for extended periods may adversely affect device
reliability.
2. VPOS is equal to VPOS1 and VPOS2 tied together for test condition purposes.
Table 4. Surge Immunity Ratings1,2
Type
Description
Rating
Unit
ESD (System-Level) Air discharge (IEC 61000-4-2)
–16.5 to 16.5
kV
Contact discharge (IEC 61000-4-2)
–8 to 8
kV
ESD (CDM)
JEDEC (JESD22-C101C)
–750 to 750
V
ESD (HBM)
JEDEC (JESD22-A114E)
–2 to 2
kV
ESD (MM)
JEDEC (JESD22-A115A)
–150 to 150
V
Notes:
1. Permanent device damage may occur if the maximum ratings are exceeded. Functional operation should be restricted
to those conditions specified in the operational sections of this data sheet. Exposure to absolute maximum rating
conditions for extended periods may adversely affect device reliability.
2. Care should be taken to follow layout guidelines.
Rev. 1.2
5
5 Page 
5. Pin Descriptions
Si3500
20 19 18 17 16 15
EROUT 1
SSFT 2
VDD 3
ISOSSFT 4
VNEG
(PAD)
14 NC
13 NC
12 VPOSF
11 NC
5 6 7 8 9 10
Pin#
1
2
3
4
5
6
7
8
9, Pad
10
11
12
13
14
15
Name
EROUT
SSFT
VDD
ISOSSFT
NC
RBIAS
HSO
NC
VNEG
NC
NC
VPOS1
NC
NC
VSSA
Table 8. Si3500 Pin Descriptions (Top View)
Description
Error-amplifier output and PWM input; directly connected to opto-coupler in isolated or
boost applications.
Soft-start output pin ramps voltage across external soft-start capacitor to allow switcher
to ramp output slowly.
5 V supply rail for switcher; provides drive for opto-coupler.
Isolated mode soft start enable input. Tie to VDD for non-isolated applications.
Connect a 0.1 µF capacitor between this pin and VSSA for isolated applications.
Do not connect (float).
A 25.5 k resistor connected from this to VPOS sets up the bias currents of the
Si3500.
Hotswap switch output; connects to VNEG through hotswap switch.
Do not connect (float).
Rectified high-voltage supply, negative rail. Must be connected to thermal PAD node
(VNEG) on package bottom. This thermal pad must be connected to VNEG (pin #9) as
well as a 2 in2 heat spreader plane using a minimum of nine thermal vias.
Do not connect (float).
Do not connect (float).
High-voltage supply, positive rail (force node)
Do not connect (float).
Do not connect (float).
Analog ground.
Rev. 1.2
11
11 Page | ||
| Páginas | Total 18 Páginas | |
| PDF Descargar | [ Datasheet Si3500.PDF ] | |
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