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ST7LU05 PDF даташит

Спецификация ST7LU05 изготовлена ​​​​«STMicroelectronics» и имеет функцию, называемую «8-bit MCU».

Детали детали

Номер произв ST7LU05
Описание 8-bit MCU
Производители STMicroelectronics
логотип STMicroelectronics логотип 

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ST7LU05 Даташит, Описание, Даташиты
ST7LUS5, ST7LU05, ST7LU09
8-bit low cost, low pin-count MCU for automotive,
with single voltage Flash memory, ADC, timers
Features
Memories
1 to 2 Kbytes single voltage Flash program
memory with readout protection, in-circuit and
in-application programming (ICP and IAP), 10k
write/erase cycles guaranteed, data retention
20 years
128 bytes RAM
Up to 128 bytes data EEPROM, 300k
write/erase cycles guaranteed, data retention
20 years
Clock, reset and supply management
Internal low voltage supervisor (LVD) for
reliable power-on/-off start-up procedures
Clock sources: Internal trimmable 8 MHz RC
oscillator, internal low power, low frequency
RC oscillator or external clock
5 power saving modes: Halt, auto wake-up
from halt, active halt, wait and slow
Interrupt management
11 interrupt vectors plus TRAP and reset
5 external interrupt lines (on 5 vectors)
I/O ports
5 multifunctional bidirectional I/O lines
1 additional output line
6 alternate function lines
5 high sink outputs
SO8 150-mil (1)
2 timers
One 8-bit lite timer with prescaler including:
watchdog, 1 real-time base and 1 input capture
One 12-bit auto-reload timer with output
compare function and PWM
A/D converter
10-bit resolution for 0 to VDD
5 input channels
Instruction set
8-bit data manipulation
63 basic instructions with illegal opcode
detection
17 main addressing modes
8 x 8 unsigned multiply instruction
Development tools
Full hardware/software development package
Debug module
Table 1. Device summary
Device
Flash program
memory
RAM/EEPROM
Peripherals
Operating CPU Operating
voltage frequency temp.
ST7LUS5
ST7LU05
ST7LU09
1 Kbyte
2 Kbytes
128 bytes RAM/no EEPROM
128 bytes RAM/128 bytes
EEPROM
Lite timer with
watchdog,
auto-reload
timer with 1
PWM,
10-bit ADC
3.0V to 5.5V
@ fCPU = 8
MHz
Up to 8
MHz RC
-40°C to
+85°C/
-40°C to
125°C
1. DIP16 package available for development or tool prototyping purposes only. Not orderable in production quantities.
February 2008
Rev 3
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1/124
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ST7LU05 Даташит, Описание, Даташиты
Contents
Contents
ST7LUS5, ST7LU05, ST7LU09
1
2
3
4
5
6
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Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Package pinout and device pin description . . . . . . . . . . . . . . . . . . . . . 12
Register and memory map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Flash program memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
4.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
4.2 Main features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
4.3 Programming modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
4.3.1 In-circuit programming (ICP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
4.3.2 In-application programming (IAP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
4.4 ICC interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
4.5 Memory protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
4.5.1 Readout protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
4.5.2 Flash write/erase protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
4.6 Register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
4.6.1 Flash control/status register (FCSR) . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Central processing unit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
5.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
5.2 Main features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
5.3 CPU registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
5.3.1 Accumulator (A) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
5.3.2 Index registers (X and Y) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
5.3.3 Program counter (PC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
5.3.4 Condition code register (CC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
5.3.5 Stack pointer (SP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Supply, reset and clock management . . . . . . . . . . . . . . . . . . . . . . . . . . 27
6.1 Internal RC oscillator adjustment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
6.2 Register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
6.2.1 Main clock control/status register (MCCSR) . . . . . . . . . . . . . . . . . . . . . 29
6.2.2 RC control register (RCCR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
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ST7LU05 Даташит, Описание, Даташиты
ST7LUS5, ST7LU05, ST7LU09
Contents
6.2.3 System integrity (SI) control/status register (SICSR) . . . . . . . . . . . . . . . 30
6.2.4 Internal RC prescaler selection register (INTRCPRR) . . . . . . . . . . . . . . 30
6.2.5 Clock controller control/status register (CKCNTCSR) . . . . . . . . . . . . . . 31
6.3 Reset sequence manager (RSM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
6.3.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
6.3.2 Asynchronous external RESET pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
6.3.3 External power-on reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
6.3.4 Internal low voltage detector (LVD) reset . . . . . . . . . . . . . . . . . . . . . . . . 34
6.3.5 Internal watchdog reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
6.4 Register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
6.4.1 Multiplexed I/O reset control register 1 (MUXCR1) . . . . . . . . . . . . . . . . 36
6.4.2 Multiplexed I/O reset control register 0 (MUXCR0) . . . . . . . . . . . . . . . . 36
7 Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
7.1 Non-maskable software interrupt . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
7.2 External interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
7.3 Peripheral interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
7.3.1 External interrupt control register 1 (EICR1) . . . . . . . . . . . . . . . . . . . . . 41
7.3.2 External interrupt control register 2 (EICR2) . . . . . . . . . . . . . . . . . . . . . 41
7.4 System integrity management (SI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
7.4.1 Low voltage detector (LVD) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
7.4.2 SI register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
8 Power saving modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
8.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
8.2 Slow mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
8.3 Wait mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
8.4 Active halt and halt modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
8.4.1 Active halt mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
8.4.2 Halt mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
8.5 Auto wake-up from halt mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
8.5.1 Register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
9 I/O ports . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
9.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
9.2 Functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
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