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PDF NL12880BC20-02D Data sheet ( Hoja de datos )
| Número de pieza | NL12880BC20-02D | |
| Descripción | TFT COLOR LCD MODULE | |
| Fabricantes | NEC | |
| Logotipo |  |
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TFT COLOR LCD MODULE
NL12880BC20-02D
31cm (12.1 Type)
WXGA
LVDS Interface (1 port)
DATA SHEET
DOD-PP-0397 (1st edition)
üRoHS
Compliant
2002/95/EC
This DATA SHEET is updated document from
PRELIMINARY DATA SHEET DOD-PP-0294(4).
All information is subject to change without notice.
Please confirm the sales representative before
starting to design your system.
Document Number: DOD-PP-0397 (1st edition) 1 © NEC LCD Technologies, Ltd.
Published date: October 2007 CP(N)
2007 All rights reserved.
1 page  
NL12880BC20-02D
2. GENERAL SPECIFICATIONS
Display area
Diagonal size of display
Drive system
Display color
Pixel
Pixel arrangement
Dot pitch
Pixel pitch
Module size
Weight
Contrast ratio
Viewing angle
Designed viewing direction
Polarizer surface
Polarizer pencil-hardness
Color gamut
Response time
Luminance
Signal system
Power supply voltage
Backlight
Power consumption
261.12 (H) × 163.2 (V)mm
31cm (12.1 inches)
a-Si TFT active matrix
16,777,216 colors (At 8-bit input, FRC terminal= High)
262,144 colors (At 6-bit input, FRC terminal= Low or Open)
1,280(H) × 800 (V) pixels
RGB (Red dot, Green dot, Blue dot) vertical stripe
0.068 (H) × 0.204 (V) mm
0.204(H) × 0.204 (V) mm
276.8 (W) × 178.5 (H) × 7.5 (D)mm (typ.)
350g (typ.)
700:1 (typ.)
At the contrast ratio ≥ 10:1
• Horizontal: Right side 85° (typ.), Left side 85° (typ.)
• Vertical: Up side 85° (typ.), Down side 85° (typ.)
• Viewing angle with optimum grayscale (γ=2.2): normal axis
(Perpendicular)
Antiglare
3H (min.) [by JIS K5400]
At LCD panel center
40 % (typ.) [against NTSC color space]
Ton + Toff (10% ←→ 90%)
25 ms (typ.)
At lamp current IBL=6.0mArms / lamp
180 cd/m2 (typ.)
LVDS 1port
(Receiver: THC63LVDF84B, THine Electronics Inc. or equivalent)
[8bit/6bit digital signals for data of RGB colors, Dot clock (CLK),
Data enable (DE), Selection of LVDS input map (MSL)]
LCD panel signal processing board: 3.3V
Edge light type: 1 cold cathode fluorescent lamps (without inverter)
At IBL=6.0mArms / lamp, Checkered flag pattern
4.8W (typ., Power dissipation of the inverter is not included.)
DATA SHEET DOD-PP-0397 (1st edition)
5
5 Page 
4.4 POWER SUPPLY VOLTAGE SEQUENCE
4.4.1 LCD panel signal processing board
VCC
Note1
0V
ON
3.0V
10μs≤ Tr < 50ms
Display signals*,
Function signals
Note2
0V
0ms < t < 35ms
VALID period
NL12880BC20-02D
OFF
ON
0.3V
Toff ≥ 50ms
0ms < t < 35ms
* These signals should be measured at the terminal of 100Ω resistance.
Note1: In terms of voltage variation (voltage drop) while VCC rising edge is below 3.0V, a protection
circuit may work, and then this product may not work.
Note2: Display signals (D0+/-, D1+/-, D2+/-, D3+/-, CLK+/-) and function signals (FRC, DPS, MSL)
must be Low or High-impedance, exclude the VALID period (See above sequence diagram),
in order to avoid that internal circuits is damaged.
If some of display and function signals of this product are cut while this product is working,
even if the signal input to it once again, it might not work normally. VCC should be cut when
the display and function signals are stopped.
DATA SHEET DOD-PP-0397 (1st edition)
11
11 Page | ||
| Páginas | Total 32 Páginas | |
| PDF Descargar | [ Datasheet NL12880BC20-02D.PDF ] | |
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