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CAP006DG Datasheet PDF Download - Power Integrations

Номер произв CAP006DG
Описание Zero Loss Automatic X Capacitor Discharge IC
Производители Power Integrations
логотип Power Integrations логотип 
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CAP006DG Даташит, Описание, Даташиты
CAPZeroFamily
Zero1 Loss Automatic X Capacitor Discharge IC
Product Highlights
Blocks current through X capacitor discharge resistors when
AC voltage is connected
Automatically discharges X capacitors through discharge
resistors when AC is disconnected
Simplifies EMI filter design – larger X capacitor allows smaller
inductive components with no change in consumption
Only two terminals – meets safety standards for use before or
after system input fuse
>4 mm creepage on package and PCB
Self supplied – no external bias required
High common mode surge immunity – no external ground
connection
High differential surge withstand – 1000 V internal MOSFETs
EcoSmart® – Energy Efficient
<5 mW consumption at 230 VAC for all X capacitor values
Applications
All ACDC converters with X capacitors >100 nF
Appliances requiring EuP Lot 6 compliance
Adapters requiring ultra low no-load consumption
All converters requiring very low standby power
Description
When AC voltage is applied, CAPZero blocks current flow in the
X capacitor safety discharge resistors, reducing the power loss to
less than 5 mW, or essentially zero1 at 230 VAC. When AC
voltage is disconnected, CAPZero automatically discharges the
X capacitor by connecting the series discharge resistors. This
operation allows total flexibility in the choice of the X capacitor to
optimize differential mode EMI filtering and reduce inductor costs,
with no change in power consumption.
Designing with CAPZero is simply a matter of selecting the
appropriate CAPZero device and external resistor values in Table 1
for the X capacitor value being used. This design choice will
provide a worst case RC time constant, when the AC supply is
disconnected, of less than 1 second as required by international
safety standards.
The simplicity and ruggedness of the two terminal CAPZero IC
makes it an ideal choice in systems designed to meet EuP Lot 6
requirements.
The CAPZero family has two voltage grades: 825 V and 1000 V.
The voltage rating required depends on surge requirement and
circuit configuration of the application. See Key Applications
Considerations section for details.
R1
D1
MOV
AC
X Capacitor
and Other
EMI Filter
Components
D2
CAPZero
R2
PI-6599-110711
Figure 1. Typical Application – Not a Simplified Circuit.
Component Selection Table
Product3
BVDSS
Maximum Total
X Capacitance
CAP002DG
CAP012DG
CAP003DG
CAP013DG
CAP004DG
CAP014DG
CAP005DG
CAP015DG
CAP006DG
CAP016DG
CAP007DG
CAP017DG
CAP008DG
CAP018DG
CAP009DG
CAP019DG
825 V
1000 V
825 V
1000 V
825 V
1000 V
825 V
1000 V
825 V
1000 V
825 V
1000 V
825 V
1000 V
825 V
1000 V
500 nF
750 nF
1 mF
1.5 mF
2 mF
2.5 mF
3.5 mF
5 mF
Total Series
Resistance2
(R1 + R2)
1.5 MW
1.02 MW
780 kW
480 kW
360 kW
300 kW
200 kW
150 kW
Table 1. Component Selection Table.
Notes:
1. IEC 62301 clause 4.5 rounds standby power use below 5 mW to zero.
2. Values are nominal. RC time constant is <1 second with ±20% X capacitor and
±5% resistance from these nominal values.
3. Packages: D: SO-8.
www.powerint.com
November 2011

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CAP006DG Даташит, Описание, Даташиты
CAPZero Family
Pin Functional Description
The pin configuration of Figure 2 ensures that the width of the
SO-8 package is used to provide creepage and clearance
distance of over 4 mm.
Although electrical connections are only made to pins 2, 3, 6
and 7, it is recommended that pins 1-4 and pins 5-8 are
coupled together on the PCB – see Applications Section.
D Package (SO-8)
NC 1
D1 2
D1 3
NC 4
8 NC
7 D2
6 D2
5 NC
Figure 2. Pin Configuration.
PI-5608-060810
2
Rev. D 11/11
www.powerint.com

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CAP006DG Даташит, Описание, Даташиты
CAPZero Family
R1
AC CEXT
D1
MOVPOS1
CAPZero
D2
R2
X Capacitor1
MOVPOS2
Other EMI
Filter
Components
X Capacitor2
PI-6600-110711
Figure 3. Placement Options of MOV and CEXT.
Key Application Considerations
Breakdown Voltage Selection
Figure 3 illustrates possible system configurations influencing
the choice of CAPZero breakdown voltage. The system
configuration variables include the placement of the system
MOV and X capacitor(s) as well as the differential surge voltage
specifications of the application.
As shown in Table 1, each device in the CAPZero family has a
825 V or 1000 V option. For applications where the system
MopOtiVoniswpilllatcyepdicianllpy opsriotivoidne1a(dMeOqVuPaOtSe1
in Figure 3), the 825 V
voltage withstand for
surge requirements up to 3 kV or more. The 1 kV CAPZero
would be recommended for higher surge requirements or if
additional voltage margin is required.
For MOV placement that is not directly across the X Capacitor1
(for example MOVPOS2 in Figure 3) the 1000 V CAPZero devices
can be used up to a surge specification of 1.5 kV. For differential
surge voltage specifications of >1.5 kV it is recommended that
the MOV is always placed in the location shown in Figure 3 as
MOVPOS1.
It is always recommended that the peak voltage between
terminals D1 and D2 of CAPZero is measured during surge
tests in the final system. Measurements of peak voltage across
CAPZero during surge tests should be made with oscilloscope
probes having appropriate voltage rating and using an isolated
supply to the oscilloscope to avoid ground currents influencing
measurement results. When making such measurements, it is
recommended that 50 V engineering margin is allowed below
the breakdown voltage specification (for example 950 V with the
1000 V CAPZero).
If the measured peak Drain voltage exceeds 950 V, an external
1 kV ceramic capacitor of value up to 47 pF can also be placed
between D1 and D2 terminals to attenuate the voltage applied
between the CAPZero terminals during surge. This optional
external capacitor placement is shown
should be noted that use of an external
acsaCpaEXcTitionr
Figure
in this
3. It
way
will
increase power consumption
discharge currents flowing in
slightly
R1 and
dRu2ewtohilteheACCEiXsT
charge/
connected.
A CEXT value of 33 pF will add approximately 0.5 mW at 230 VAC,
50 Hz.
PCB Layout and External Resistor Selection
Figure 4 shows a typical PCB layout configuration for CAPZero.
The external resistors in this case are divided into two separate
surface mount resistors to distribute loss under fault conditions
– for example where a short-circuit exists between CAPZero
terminals D1 and D2. R1 and R2 values are selected according
to Table 1.
Under a fault condition where CAPZero terminals D1 and D2 are
shorted together, each resistor will dissipate a power that can
be calculated from the applied AC voltage and the R1 and R2
values. For example in an application using CAP004 or CAP014,
R1=R2=390 kW. If CAPZero is shorted out at 265 VAC R1 and
R2 will each dissipate 45 mW.
Resistors R1 and R2 should also be rated for 50% of the system
input voltage again to allow for the short-circuitry of CAPZero
D1 to D2 pins during single point fault testing.
If lower dissipation or lower voltage across each resistor is
required during fault tests, the total external resistance can be
divided into more discrete resistors, however the total resistance
must be equal to that specified in Table 1.
www.powerint.com
3
Rev. D 11/11






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