PHB110NQ08T PDF даташит
Спецификация PHB110NQ08T изготовлена «NXP Semiconductors» и имеет функцию, называемую «N-channel TrenchMOS standard level FET». |
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Детали детали
Номер произв | PHB110NQ08T |
Описание | N-channel TrenchMOS standard level FET |
Производители | NXP Semiconductors |
логотип |
12 Pages
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PHB110NQ08T
N-channel TrenchMOS standard level FET
Rev. 02 — 12 October 2009
Product data sheet
1. Product profile
1.1 General description
Standard level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic
package using TrenchMOS technology. This product is designed and qualified for use in
computing, communications, consumer and industrial applications only.
1.2 Features and benefits
Low conduction losses due to low
on-state resistance
Suitable for standard level gate drive
sources
1.3 Applications
DC-to-DC convertors
General industrial applications
Motors, lamps and solenoids
Uninterruptible power supplies
1.4 Quick reference data
Table 1. Quick reference
Symbol Parameter
Conditions
VDS drain-source voltage Tj ≥ 25 °C; Tj ≤ 175 °C
ID drain current
Tmb = 25 °C; VGS = 10 V;
see Figure 1 and 3
Ptot total power
dissipation
Tmb = 25 °C; see Figure 2
Dynamic characteristics
QGD
gate-drain charge
VGS = 10 V; ID = 25 A;
VDS = 60 V; Tj = 25 °C;
see Figure 11
Static characteristics
RDSon
drain-source
VGS = 10 V; ID = 25 A;
on-state resistance Tj = 25 °C; see Figure 9 and 10
Min Typ Max Unit
- - 75 V
- - 75 A
- - 230 W
- 48.2 - nC
-
7.7 9
mΩ
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NXP Semiconductors
PHB110NQ08T
N-channel TrenchMOS standard level FET
2. Pinning information
Table 2. Pinning information
Pin Symbol Description
1G
gate
2D
drain
3S
source
mb D
mounting base; connected to
drain
[1] It is not possible to make a connection to pin 2.
Simplified outline
[1] mb
2
13
SOT404 (D2PAK)
3. Ordering information
Graphic symbol
D
G
mbb076 S
Table 3. Ordering information
Type number
Package
Name
Description
PHB110NQ08T D2PAK
plastic single-ended surface-mounted package (D2PAK); 3 leads (one
lead cropped)
Version
SOT404
4. Limiting values
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
VDS
VDGR
VGS
ID
Parameter
drain-source voltage
drain-gate voltage
gate-source voltage
drain current
IDM peak drain current
Ptot total power dissipation
Tstg storage temperature
Tj junction temperature
Source-drain diode
Conditions
Tj ≥ 25 °C; Tj ≤ 175 °C
Tj ≥ 25 °C; Tj ≤ 175 °C; RGS = 20 kΩ
VGS = 10 V; Tmb = 100 °C; see Figure 1
VGS = 10 V; Tmb = 25 °C; see Figure 1 and 3
tp ≤ 10 µs; pulsed; Tmb = 25 °C; see Figure 3
Tmb = 25 °C; see Figure 2
IS source current Tmb = 25 °C
ISM peak source current tp ≤ 10 µs; pulsed; Tmb = 25 °C
Avalanche ruggedness
EDS(AL)S
non-repetitive
VGS = 10 V; Tj(init) = 25 °C; ID = 75 A; Vsup ≤ 75 V;
drain-source avalanche unclamped; tp = 0.15 ms; RGS = 50 Ω
energy
Min Max Unit
- 75 V
- 75 V
-20 20
V
- 75 A
- 75 A
- 440 A
- 230 W
-55 175 °C
-55 175 °C
- 75 A
- 440 A
- 560 mJ
PHB110NQ08T_2
Product data sheet
Rev. 02 — 12 October 2009
© NXP B.V. 2009. All rights reserved.
2 of 12
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NXP Semiconductors
03ap74
120
Ider
(%)
80
PHB110NQ08T
N-channel TrenchMOS standard level FET
120
Pder
(%)
80
03aa16
40 40
0
0 50 100 150 200
Tmb (°C)
0
0 50 100 150 200
Tmb (°C)
Fig 1. Normalized continuous drain current as a
function of mounting base temperature
103
ID
(A)
102
RDSon = VDS/ID
10 P
δ = tp
T
tp
T
t
1
1
Fig 2. Normalized total power dissipation as a
function of mounting base temperature
03nb44
D.C.
10
VDS (V)
tp = 10 us
100 us
1 ms
10 ms
100 ms
102
Fig 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage
PHB110NQ08T_2
Product data sheet
Rev. 02 — 12 October 2009
© NXP B.V. 2009. All rights reserved.
3 of 12
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