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PDF RTL8139D-GR Data sheet ( Hoja de datos )
| Número de pieza | RTL8139D-GR | |
| Descripción | SINGLE-CHIP MULTI-FUNCTION 10/100Mbps ETHERNET CONTROLLER | |
| Fabricantes | Realtek Microelectronics | |
| Logotipo |  |
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RTL8139D
RTL8139DL
RTL8139D-LF
RTL8139DL-LF
RTL8139D-GR
RTL8139DL-GR
SINGLE-CHIP MULTI-FUNCTION 10/100Mbps
ETHERNET CONTROLLER WITH POWER
MANAGEMENT
DATASHEET
Rev. 1.2
08 Aug 2005
Track ID: JATR-1076-21
1 page  
12.
12.1.
12.2.
13.
RTL8139DL
Datasheet
MECHANICAL DIMENSIONS ......................................................................................59
QFP ......................................................................................................................................59
LQFP....................................................................................................................................60
ORDERING INFORMATION.........................................................................................61
Single Chip Multifunction 10/100 Ethernet Controller w/Power Management v Track ID: JATR-1076-21 Rev. 1.2
5 Page 
Symbol
GNTB
Type
I
REQB
IDSEL
INTAB
IRDYB
T/S
I
O/D
S/T/S
TRDYB
S/T/S
PAR
PERRB
T/S
S/T/S
SERRB
STOPB
RSTB
O/D
S/T/S
I
Pin No
84
85
99
81
13
14
20
18
19
17
82
RTL8139DL
Datasheet
Description
Grant: This signal is asserted low to indicate to the RTL8139D(L) that
the central arbiter has granted ownership of the bus to the
RTL8139D(L). This input is used when the RTL8139D(L) is acting as a
bus master.
Request: The RTL8139D(L) will assert this signal low to request the
ownership of the bus from the central arbiter.
Initialization Device Select: This pin allows the RTL8139D(L) to
identify when configuration read/write transactions are intended for it.
INTAB: Used to request an interrupt. It is asserted low when an
interrupt condition occurs, as defined by the Interrupt Status, Interrupt
Mask and Interrupt Enable registers.
Initiator Ready: This indicates the initiating agent’s ability to complete
the current data phase of the transaction.
As a bus master, this signal will be asserted low when the RTL8139D(L)
is ready to complete the current data phase transaction. This signal is used
in conjunction with the TRDYB signal. Data transaction takes place at the
rising edge of CLK when both IRDYB and TRDYB are asserted low. As
a target, this signal indicates that the master has put data on the bus.
Target Ready: This indicates the target agent’s ability to complete the
current phase of the transaction.
As a bus master, this signal indicates that the target is ready for the data
during write operations and with the data during read operations. As a
target, this signal will be asserted low when the (slave) device is ready
to complete the current data phase transaction. This signal is used in
conjunction with the IRDYB signal. Data transaction takes place at the
rising edge of CLK when both IRDYB and TRDYB are asserted low.
Parity: This signal indicates even parity across AD31-0 and C/BE3-0
including the PAR pin. As a master, PAR is asserted during address and
write data phases. As a target, PAR is asserted during read data phases.
Parity Error: When the RTL8139D(L) is the bus master and a parity
error is detected, the RTL8139D(L) asserts both SERR bit in ISR and
Configuration Space command bit 8 (SERRB enable). Next, it
completes the current data burst transaction, then stops operation and
resets itself. After the host clears the system error, the RTL8139D(L)
continues its operation.
When the RTL8139D(L) is the bus target and a parity error is detected,
the RTL8139D(L) asserts this PERRB pin low.
System Error: If an address parity error is detected and Configuration
Space Status register bit 15 (detected parity error) is enabled,
RTL8139D(L) asserts both SERRB pin low and bit 14 of Status register
in Configuration Space.
Stop: Indicates the current target is requesting the master to stop the
current transaction.
Reset: When RSTB is asserted low, the RTL8139D(L) performs
internal system hardware reset. RSTB must be held for a minimum of
120 ns.
Single Chip Multifunction 10/100 Ethernet Controller w/Power Management 5 Track ID: JATR-1076-21 Rev. 1.2
11 Page | ||
| Páginas | Total 67 Páginas | |
| PDF Descargar | [ Datasheet RTL8139D-GR.PDF ] | |
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