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P3NK90Z PDF даташит

Спецификация P3NK90Z изготовлена ​​​​«STMicroelectronics» и имеет функцию, называемую «STP3NK90Z».

Детали детали

Номер произв P3NK90Z
Описание STP3NK90Z
Производители STMicroelectronics
логотип STMicroelectronics логотип 

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P3NK90Z Даташит, Описание, Даташиты
STP3NK90Z - STP3NK90ZFP
STD3NK90Z - STD3NK90Z-1
N-CHANNEL 900V - 4.1- 3A TO-220/TO-220FP/DPAK/IPAK
Zener-Protected SuperMESH™Power MOSFET
TYPE
VDSS RDS(on)
ID
Pw
STP3NK90Z
STP3NK90ZFP
STD3NK90Z
STD3NK90Z-1
900 V
900 V
900 V
900 V
< 4.8
< 4.8
< 4.8
< 4.8
3A
3A
3A
3A
90 W
25 W
90 W
90 W
TYPICAL RDS(on) = 4.1
EXTREMELY HIGH dv/dt CAPABILITY
100% AVALANCHE TESTED
GATE CHARGE MINIMIZED
VERY LOW INTRINSIC CAPACITANCES
VERY GOOD MANUFACTURING
REPEATIBILITY
DESCRIPTION
The SuperMESH™ series is obtained through an
extreme optimization of ST’s well established strip-
based PowerMESH™ layout. In addition to pushing
on-resistance significantly down, special care is tak-
en to ensure a very good dv/dt capability for the
most demanding applications. Such series comple-
ments ST full range of high voltage MOSFETs in-
cluding revolutionary MDmesh™ products.
TO-220
3
1
DPAK
3
2
1
TO-220FP
IPAK
3
2
1
INTERNAL SCHEMATIC DIAGRAM
APPLICATIONS
HIGH CURRENT, HIGH SPEED SWITCHING
IDEAL FOR OFF-LINE POWER SUPPLIES,
ADAPTORS AND PFC
LIGHTING
ORDERING INFORMATION
SALES TYPE
MARKING
STP3NK90Z
P3NK90Z
STP3NK90ZFP
P3NK90ZFP
STD3NK90ZT4
D3NK90Z
STD3NK90Z-1
D3NK90Z
PACKAGE
TO-220
TO-220FP
DPAK
IPAK
PACKAGING
TUBE
TUBE
TAPE & REEL
TUBE
November 2002
This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice.
1/13
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P3NK90Z Даташит, Описание, Даташиты
STP3NK90Z - STP3NK90ZFP - STD3NK90Z - STD3NK90Z-1
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
VDS Drain-source Voltage (VGS =0 )
VDGR
Drain-gate Voltage (RGS =2 0k )
VGS Gate- source Voltage
ID Drain Current (continuous) at TC = 25°C
ID Drain Current (continuous) at TC = 100°C
IDM ( ) Drain Current (pulsed)
PTOT
Total Dissipation at TC = 25°C
Derating Factor
VESD(G-S) Gate source ESD(HBM-C=100pF, R=1.5KΩ)
dv/dt (1) Peak Diode Recovery voltage slope
VISO
Insulation Withstand Voltage (DC)
Tj Operating Junction Temperature
Tstg Storage Temperature
( ) Pulse width limited by safe operating area
(1) ISD 3A, di/dt 200A/µs, VDD V(BR)DSS, Tj TJMAX.
(*) Limited only by maximum temperature allowed
STP3NK90Z
3
1.89
12
90
0.72
-
Value
STP3NK90ZFP
900
STD3NK90Z
STD3NK90Z-1
900
± 30
3 (*) 3
1.89 (*)
1.89
12 (*)
12
25 90
0.2 0.72
4000
4.5
2500
-
-55t o1 50
THERMAL DATA
Rthj-case
Rthj-amb
Tl
Thermal Resistance Junction-case Max
Thermal Resistance Junction-ambient Max
Maximum Lead Temperature For Soldering Purpose
TO-220 TO-220FP
1.38
5
62.5
300
DPAK
IPAK
1.38
100
Unit
V
V
V
A
A
A
W
W/°C
V
V/ns
V
°C
°C/W
°C/W
°C
AVALANCHE CHARACTERISTICS
Symbol
Parameter
IAR Avalanche Current, Repetitive or Not-Repetitive
(pulse width limited by Tj max)
EAS Single Pulse Avalanche Energy
(starting Tj = 25 °C, ID =I AR,V DD =5 0 V)
Max Value
3A
180
Unit
mJ
GATE-SOURCE ZENER DIODE
Symbol
Parameter
BVGSO
Gate-Source Breakdown
Voltage
Test Conditions
Igs=± 1mA (Open Drain)
Min.
30
Typ.
Max.
Unit
V
PROTECTION FEATURES OF GATE-TO-SOURCE ZENER DIODES
The built-in back-to-back Zener diodes have specifically been designed to enhance not only the device’s
ESD capability, but also to make them safely absorb possible voltage transients that may occasionally be
applied from gate to source. In this respect the Zener voltage is appropriate to achieve an efficient and
cost-effective intervention to protect the device’s integrity. These integrated Zener diodes thus avoid the
usage of external components.
2/13









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P3NK90Z Даташит, Описание, Даташиты
STP3NK90Z - STP3NK90ZFP - STD3NK90Z - STD3NK90Z-1
ELECTRICAL CHARACTERISTICS (TCASE =25°C UNLESS OTHERWISE SPECIFIED)
ON/OFF
Symbol
Parameter
Test Conditions
Min. Typ. Max.
V(BR)DSS Drain-source
Breakdown Voltage
ID =1m A, VGS = 0
900
IDSS
Zero Gate Voltage
Drain Current (VGS =0 )
VDS = Max Rating
VDS = Max Rating, TC = 125 °C
1
50
IGSS
Gate-body Leakage
Current (VDS =0 )
VGS = ± 30 V
±10
VGS(th) Gate Threshold Voltage
VDS =V GS,I D =5 0 µA
3
3.75
4.5
RDS(on)
Static Drain-source On
Resistance
VGS =1 0 V,I D = 1.5 A
4.1 4.8
DYNAMIC
Symbol
Parameter
gfs (1) Forward Transconductance
Ciss
Coss
Crss
Input Capacitance
Output Capacitance
Reverse Transfer
Capacitance
Coss eq. (3) Equivalent Output
Capacitance
SWITCHING ON
Symbol
Parameter
td(on)
tr
Turn-on Delay Time
Rise Time
Qg Total Gate Charge
Qgs Gate-Source Charge
Qgd Gate-Drain Charge
Test Conditions
VDS =1 5V , ID = 1.5 A
VDS =2 5V ,f= 1M Hz, VGS = 0
Min.
VGS =0V , VDS =0 Vt o 400V
Test Conditions
VDD =4 50V , ID = 1.5 A
RG = 4.7VGS =1 0 V
(Resistive Load see, Figure 3)
VDD =7 20V, ID =3 A,
VGS =1 0V
Min.
Typ.
2.7
590
63
13
34
Typ.
18
7
22.7
4.2
12
Max.
Max.
SWITCHING OFF
Symbol
Parameter
td(off)
tf
Turn-off Delay Time
Fall Time
tr(Voff)
tf
tc
Off-voltage Rise Time
Fall Time
Cross-over Time
Test Conditions
VDD = 720 V, ID = 1.5 A
RG =4 .7VGS =1 0 V
(Resistive Load see, Figure 3)
VDD = 450V, ID =3 A,
RG =4 .7Ω, VGS = 10V
(Inductive Load see, Figure 5)
Min.
Typ.
45
18
14.5
15
16
Max.
Unit
V
µA
µA
µA
V
Unit
S
pF
pF
pF
pF
Unit
ns
ns
nC
nC
nC
Unit
ns
ns
ns
ns
ns
SOURCE DRAIN DIODE
Symbol
Parameter
Test Conditions
Min. Typ. Max. Unit
ISD
ISDM (2)
Source-drain Current
Source-drain Current (pulsed)
3A
12 A
VSD (1) Forward On Voltage
ISD = 3 A, VGS =0
1.6 V
trr
Qrr
IRRM
Reverse Recovery Time
Reverse Recovery Charge
Reverse Recovery Current
ISD = 3 A, di/dt = 100A/µs
VDD =1 00V, Tj =1 50°C
(see test circuit, Figure 5)
510 ns
2.2 µC
8.7 A
Note: 1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %.
2. Pulse width limited by safe operating area.
3. Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80%
VDSS.
3/13










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Номер в каталогеОписаниеПроизводители
P3NK90ZSTP3NK90ZSTMicroelectronics
STMicroelectronics
P3NK90ZSTP3NK90ZSTMicroelectronics
STMicroelectronics

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