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24C02A-ESL PDF даташит

Спецификация 24C02A-ESL изготовлена ​​​​«MicrochipTechnology» и имеет функцию, называемую «1K/2K/4K 5.0V I2C Serial EEPROMs».

Детали детали

Номер произв 24C02A-ESL
Описание 1K/2K/4K 5.0V I2C Serial EEPROMs
Производители MicrochipTechnology
логотип MicrochipTechnology логотип 

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24C02A-ESL Даташит, Описание, Даташиты
24C01A/02A/04A
1K/2K/4K 5.0V I2CSerial EEPROMs
FEATURES
• Low power CMOS technology
• Hardware write protect
• Two wire serial interface bus, I2Ccompatible
• 5.0V only operation
• Self-timed write cycle (including auto-erase)
• Page-write buffer
• 1ms write cycle time for single byte
• 1,000,000 Erase/Write cycles guaranteed
• Data retention >200 years
• 8-pin DIP/SOIC packages
• Available for extended temperature ranges
- Commercial (C):
- Industrial (I):
- Automotive (E):
0˚C to +70˚C
-40˚C to +85˚C
-40˚C to +125˚C
DESCRIPTION
The Microchip Technology Inc. 24C01A/02A/04A is a
1K/2K/4K bit Electrically Erasable PROM. The device
is organized as shown, with a standard two wire serial
interface. Advanced CMOS technology allows a signif-
icant reduction in power over NMOS serial devices. A
special feature in the 24C02A and 24C04A provides
hardware write protection for the upper half of the block.
The 24C01A and 24C02A have a page write capability
of two bytes and the 24C04A has a page length of eight
bytes. Up to eight 24C01A or 24C02A devices and up
to four 24C04A devices may be connected to the same
two wire bus.
This device offers fast (1ms) byte write and
extended (-40°C to 125°C) temperature operation. It
is recommended that all other applications use
Microchip’s 24LCXXB.
Organization
Write Protect
Page Write
Buffer
24C01A
128 x 8
None
2 Bytes
24C02A
258 x 8
080-0FF
2 Bytes
24C04A
2 x 256 x 8
100-1FF
8 Bytes
PACKAGE TYPES
DIP A0 1
A1 2
A2 3
VSS 4
8-lead
SOIC A0
A1
A2
VSS
1
2
3
4
14-lead
SOIC
NC
A0
A1
NC
1
2
3
4
A2 5
VSS 6
NC 7
* “TEST” pin in 24C01A
BLOCK DIAGRAM
Vcc
Vss
SDA
Data
Buffer
(FIFO)
Data Reg.
Slave Addr.
SCL
Control
Logic
I2C is a trademark of Philips Corporation.
A0 A1 A2 WP
© 1996 Microchip Technology Inc.
This document was created with FrameMaker 4 0 4
8 VCC
7 WP*
6 SCL
5 SDA
8 VCC
7 WP*
6 SCL
5 SDA
14 NC
13 VCC
12 WP
11 NC
10 SCL
9 SDA
8 NC
Vpp R/W Amp
AP
do
di
rn
et
se
A0 to
A7
sr
Memory
Array
Increment
A8
DS11183D-page 1









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24C02A-ESL Даташит, Описание, Даташиты
24C01A/02A/04A
1.0 ELECTRICAL CHARACTERISTICS
1.1 Maximum Ratings*
VCC...................................................................................7.0V
All inputs and outputs w.r.t. VSS ............... -0.6V to VCC +1.0V
Storage temperature ..................................... -65˚C to +150˚C
Ambient temp. with power applied ................ -65˚C to +125˚C
Soldering temperature of leads (10 seconds) ............. +300˚C
ESD protection on all pins................................................4 kV
*Notice: Stresses above those listed under “Maximum ratings”
may cause permanent damage to the device. This is a stress rat-
ing only and functional operation of the device at those or any
other conditions above those indicated in the operational listings
of this specification is not implied. Exposure to maximum rating
conditions for extended periods may affect device reliability.
TABLE 1-1: PIN FUNCTION TABLE
Name
A0
A0, A1, A2
VSS
SDA
SCL
TEST
WP
VCC
Function
No Function for 24C04A only, Must
be connected to VCC or VSS
Chip Address Inputs
Ground
Serial Address/Data I/O
Serial Clock
(24C01A only) VCC or VSS
Write Protect Input
+5V Power Supply
TABLE 1-2: DC CHARACTERISTICS
VCC = +5V (±10%)
Commercial (C): Tamb = 0°C to +70°C
Industrial (I): Tamb = -40°C to +85°C
Automotive (E): Tamb = -40°C to +125°C
Parameter
Symbol Min.
Max. Units
Conditions
VCC detector threshold
VTH
SCL and SDA pins:
High level input voltage
Low level input voltage
Low level output voltage
VIH
VIL
VOL
A1 & A2 pins:
High level input voltage
Low level input voltage
VIH
VIL
Input leakage current
ILI
Output leakage current
ILO
Pin capacitance
(all inputs/outputs)
CIN,
COUT
Operating current
ICC Write
2.8
VCC x 0.7
-0.3
VCC - 0.5
-0.3
4.5
VCC + 1
VCC x 0.3
0.4
VCC + 0.5
0.5
10
10
7.0
3.5
V
V
V
V
V
V
µA
µA
pF
mA
ICC Write —
4.25 mA
ICC
Read
750 µA
Standby current
ICCS
100 µA
Note: This parameter is periodically sampled and not 100% tested
IOL = 3.2 mA (SDA only)
VIN = 0V to VCC
VOUT = 0V to VCC
VIN/VOUT = 0V (Note)
Tamb = +25˚C, f = 1 MHz
FCLK = 100 kHz, program cycle time = 1 ms,
Vcc = 5V, Tamb = 0˚C to +70˚C
FCLK = 100 kHz, program cycle time = 1 ms,
Vcc = 5V, Tamb = (I) and (E)
VCC = 5V, Tamb= (C), (I) and (E)
SDA=SCL=VCC=5V (no PROGRAM active)
FIGURE 1-1: BUS TIMING START/STOP
VHYS
SCL
SDA
TSU:STA
THD:STA
TSU:STO
START
STOP
DS11183D-page 2
© 1996 Microchip Technology Inc.









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24C02A-ESL Даташит, Описание, Даташиты
24C01A/02A/04A
TABLE 1-3: AC CHARACTERISTICS
Parameter
Symbol Min.
Typ Max.
Units
Remarks
Clock frequency
FCLK
— — 100
kHz
Clock high time
THIGH 4000 — —
ns
Clock low time
TLOW 4700 — —
ns
SDA and SCL rise time
TR
— — 1000
ns
SDA and SCL fall time
TF — — 300 ns
START condition hold time THD:STA 4000 — —
ns After this period the first
clock pulse is generated
START condition setup time TSU:STA 4700 — —
ns Only relevant for repeated
START condition
Data input hold time
THD:DAT
0
——
ns
Data input setup time
TSU:DAT
250
——
ns
Data output delay time
TAA 300 — 3500
(Note 1)
STOP condition setup time
TSU:STO 4700
ns
Bus free time
TBUF
4700
——
ns Time the bus must be free
before a new transmission
can start
Input filter time constant
(SDA and SCL pins)
TI
— — 100
ns
Program cycle time
TWC — .4 1
ms Byte mode
.4N N
ms Page mode, N=# of bytes
Endurance
1M — —
cycles 25°C, Vcc = 5.0V, Block
Mode (Note 2)
Note 1: As transmitter the device must provide this internal minimum delay time to bridge the undefined region (min-
imum 300 ns) of the falling edge of SCL to avoid unintended generation of START or STOP conditions.
2: This parameter is not tested but guaranteed by characterization. For endurance estimates in a specific appli-
cation, please consult the Total Endurance Model which can be obtained on our BBS or website.
FIGURE 1-2: BUS TIMING DATA
TF
TLOW
THIGH
TR
SCL
TSU:STA
SDA
IN
SDA
OUT
TSP
TAA
THD:STA
THD:DAT
THD:STA
TAA
TSU:DAT
TSU:STO
TBUF
© 1996 Microchip Technology Inc.
DS11183D-page 3










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