DataSheet26.com

AX1000 PDF даташит

Спецификация AX1000 изготовлена ​​​​«Actel» и имеет функцию, называемую «Axcelerator Family FPGAs».

Детали детали

Номер произв AX1000
Описание Axcelerator Family FPGAs
Производители Actel
логотип Actel логотип 

30 Pages
scroll

No Preview Available !

AX1000 Даташит, Описание, Даташиты
Axcelerator Family FPGAs
v2.7
ue
Leading-Edge Performance
• 350+ MHz System Performance
• 500+ MHz Internal Performance
• High-Performance Embedded FIFOs
• 700 Mb/s LVDS Capable I/Os
Specifications
• Up to 2 Million Equivalent System Gates
• Up to 684 I/Os
• Up to 10,752 Dedicated Flip-Flops
• Up to 295 kbits Embedded SRAM/FIFO
• Manufactured on Advanced 0.15 μm CMOS Antifuse
Process Technology, 7 Layers of Metal
Features
• Single-Chip, Nonvolatile Solution
• Up to 100% Resource Utilization with 100% Pin Locking
• 1.5V Core Voltage for Low Power
• Footprint Compatible Packaging
• Flexible, Multi-Standard I/Os:
– 1.5V, 1.8V, 2.5V, 3.3V Mixed Voltage Operation
– Bank-Selectable I/Os – 8 Banks per Chip
– Single-Ended I/O Standards: LVTTL, LVCMOS, 3.3V
PCI, and 3.3V PCI-X
– Differential I/O Standards: LVPECL and LVDS
Table 1-1 • Axcelerator Family Product Profile
Device
Capacity (in Equivalent System Gates)
Typical Gates
Modules
Register (R-cells)
Combinatorial (C-cells)
Maximum Flip-Flops
Embedded RAM/FIFO
Number of Core RAM Blocks
Total Bits of Core RAM
Clocks (Segmentable)
Hardwired
Routed
PLLs
I/Os
I/O Banks
Maximum User I/Os
Maximum LVDS Channels
Total I/O Registers
Package
CSP
PQFP
BGA
FBGA
CQFP
CCGA
AX125
125,000
82,000
672
1,344
1,344
4
18,432
4
4
8
8
168
84
504
180
256, 324
– Voltage-Referenced I/O Standards: GTL+, HSTL
Class 1, SSTL2 Class 1 and 2, SSTL3 Class 1 and 2
– Registered I/Os
– Hot-Swap Compliant I/Os (except PCI)
– Programmable Slew Rate and Drive Strength on
Outputs
– Programmable Delay and Weak Pull-Up/Pull-Down
Circuits on Inputs
• Embedded Memory:
– Variable-Aspect 4,608-bit RAM Blocks (x1, x2, x4,
x9, x18, x36 Organizations Available)
– Independent, Width-Configurable Read and Write Ports
– Programmable Embedded FIFO Control Logic
• Segmentable Clock Resources
• Embedded Phase-Locked Loop:
– 14-200 MHz Input Range
– Frequency Synthesis Capabilities up to 1 GHz
• Deterministic, User-Controllable Timing
• Unique In-System Diagnostic and Debug Capability
with Actel Silicon Explorer II
• Boundary-Scan Testing Compliant with IEEE Standard
1149.1 (JTAG)
• FuseLockTM Secure Programming Technology
Prevents Reverse Engineering and Design Theft
AX250
250,000
154,000
1,408
2,816
2,816
12
55,296
4
4
8
8
248
124
744
208
256, 484
208, 352
AX500
500,000
286,000
2,688
5,376
5,376
16
73,728
4
4
8
8
336
168
1,008
AX1000
1,000,000
612,000
6,048
12,096
12,096
36
165,888
4
4
8
8
516
258
1,548
AX2000
2,000,000
1,060,000
10,752
21,504
21,504
64
294,912
4
4
8
8
684
342
2,052
208
484, 676
208, 352
729
484, 676, 896
352
624
896, 1152
352
624
November 2008
© 2008 Actel Corporation
i
*See Actel’s website for the latest version of the datasheet.
http://www.Datasheet4U.com









No Preview Available !

AX1000 Даташит, Описание, Даташиты
Axcelerator Family FPGAs
Ordering Information
AX1000 _ 1
FG G
896 I
Application
Blank = Commercial (0 to +70° C)
PP = Pre-Production
I = Industrial (-40 to +85° C)
M = Military (-55 to +125° C)
B = MIL-STD-883 Class B
Package Lead Count
Lead-Free Packaging
Blank = Standard Packaging
G= RoHS-Compliant Packaging
Package Type
BG = Ball Grid Array (1.27mm pitch)
FG = Fine Ball Grid Array (1.0mm pitch)
CS = Chip Scale Package (0.8mm pitch)
PQ = Plastic Quad Flat Pack (0.5mm pitch)
CQ = Ceramic Quad Flat Pack (0.5mm pitch)
CG = Ceramic Column Grid Array
Speed Grade
Blank = Standard Speed
1 = Approximately 15% Faster than Standard
2 = Approximately 25% Faster than Standard
Part Number
AX125 = 125,000 Equivalent System Gates
AX250 = 250,000 Equivalent System Gates
AX500 = 500,000 Equivalent System Gates
AX1000 = 1,000,000 Equivalent System Gates
AX2000 = 2,000,000 Equivalent System Gates
Device Resources
User I/Os (Including Clock Buffers)
Package
AX125
AX250
AX500
AX1000
AX2000
CS180
98 – – – –
PQ208
– 115 115 –
CQ208
– 115 115 –
FG256
138 138
FG324
168 – – – –
CQ352
– 198 198 198 198
FG484
– 248 317 317 –
CG624
– – – 418 418
FG676
– – 336 418 –
BG729
– – – 516 –
FG896
– – – 516 586
FG1152
– – – – 684
Note: The FG256, FG324, and FG484 are footprint compatible with one another. The FG676, FG896, and FG1152 are also footprint
compatible with one another.
ii v2.7
http://www.Datasheet4U.com









No Preview Available !

AX1000 Даташит, Описание, Даташиты
Temperature Grade Offerings
Package
CS180
PQ208
CQ208
FG256
FG324
CQ352
FG484
CG624
FG676
BG729
FG896
FG1152
Notes:
1. C = Commercial
2. I = Industrial
3. M = Military
4. B = MIL-STD-883 Class B
AX125
C, I
C, I
C, I
AX250
C, I, M
M, B
C, I, M
M, B
C, I, M
AX500
C, I, M
M, B
M, B
C, I, M
C, I, M
Speed Grade and Temperature Grade Matrix
C
I
M
B
Notes:
5. C = Commercial
6. I = Industrial
7. M = Military
8. B = MIL-STD-883 Class B
Std
–1
Axcelerator Family FPGAs
AX1000
M, B
C, I, M
M, B
C, I, M
C, I, M
C, I, M
AX2000
M, B
M, B
C, I, M
C, I, M
–2
Packaging Data
Refer to the following documents located on the Actel website for additional packaging information.
Package Mechanical Drawings
Package Thermal Characteristics and Weights
Hermatic Package Mechanical Information
Contact your local Actel representative for device availability.
v2.7
iii
http://www.Datasheet4U.com










Скачать PDF:

[ AX1000.PDF Даташит ]

Номер в каталогеОписаниеПроизводители
AX1000Axcelerator Family FPGAsActel
Actel
AX1006400mA Low Dropout Linear RegulatorAXElite
AXElite
AX1006Audio Player MicrocontrollerAppoTech
AppoTech
AX10071A Low Dropout Linear RegulatorAXElite
AXElite

Номер в каталоге Описание Производители
TL431

100 мА, регулируемый прецизионный шунтирующий регулятор

Unisonic Technologies
Unisonic Technologies
IRF840

8 А, 500 В, N-канальный МОП-транзистор

Vishay
Vishay
LM317

Линейный стабилизатор напряжения, 1,5 А

STMicroelectronics
STMicroelectronics

DataSheet26.com    |    2020    |

  Контакты    |    Поиск