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74HC574 PDF даташит

Спецификация 74HC574 изготовлена ​​​​«ON Semiconductor» и имеет функцию, называемую «Octal 3-State Noninverting D Flip-Flop».

Детали детали

Номер произв 74HC574
Описание Octal 3-State Noninverting D Flip-Flop
Производители ON Semiconductor
логотип ON Semiconductor логотип 

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74HC574 Даташит, Описание, Даташиты
74HC574
Octal 3−State Noninverting
D Flip−Flop
HighPerformance SiliconGate CMOS
The 74HC574 is identical in pinout to the LS574. The device inputs
are compatible with standard CMOS outputs; with pullup resistors,
they are compatible with LSTTL outputs.
Data meeting the setup time is clocked to the outputs with the
rising edge of the Clock. The Output Enable input does not affect the
states of the flipflops but when Output Enable is high, all device
outputs are forced to the highimpedance state. Thus, data may be
stored even when the outputs are not enabled.
The HC574 is identical in function to the HC374A but has the
flipflop inputs on the opposite side of the package from the outputs to
facilitate PC board layout.
Features
Output Drive Capability: 15 LSTTL Loads
Outputs Directly Interface to CMOS, NMOS, and TTL
Operating Voltage Range: 2.0 to 6.0 V
Low Input Current: 1.0 mA
In Compliance with the Requirements Defined by JEDEC Standard
No. 7A
ESD Performance: HBM > 2000 V; Machine Model > 200 V
Chip Complexity: 266 FETs or 66.5 Equivalent Gates
This is a PbFree Device
20
1
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MARKING
DIAGRAMS
20
TSSOP20
DT SUFFIX
CASE 948E
1
HC
574
ALYW G
G
HC574 = Device Code
A = Assembly Location
L = Wafer Lot
Y = Year
W = Work Week
G = PbFree Package
(Note: Microdot may be in either location)
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 3 of this data sheet.
© Semiconductor Components Industries, LLC, 2007
March, 2007 Rev. 1
1
Publication Order Number:
74HC574/D
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74HC574 Даташит, Описание, Даташиты
OUTPUT
ENABLE
D0
D1
D2
D3
D4
D5
D6
D7
GND
1
2
3
4
5
6
7
8
9
10
20 VCC
19 Q0
18 Q1
17 Q2
16 Q3
15 Q4
14 Q5
13 Q6
12 Q7
11 CLOCK
Figure 1. Pin Assignment
74HC574
FUNCTION TABLE
Inputs
OE Clock D
Output
Q
L
L
L L,H,
HX
HH
LL
X No Change
XZ
X = Don’t Care
Z = High Impedance
DATA
INPUTS
D0 2
D1 3
D2 4
D3 5
D4 6
D5 7
D6 8
D7 9
CLOCK 11
OUTPUT ENABLE 1
19 Q0
18 Q1
17 Q2
16 Q3
15 Q4
14 Q5
13 Q6
12 Q7
NONINVERTING
OUTPUTS
PIN 20 = VCC
PIN 10 = GND
Figure 2. Logic Diagram
Design Criteria
Internal Gate Count*
Value
66.5
Units
ea.
Internal Gate Propagation Delay
1.5 ns
Internal Gate Power Dissipation
5.0 mW
Speed Power Product
0.0075
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ*Equivalent to a twoinput NAND gate.
pJ
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74HC574 Даташит, Описание, Даташиты
74HC574
MAXIMUM RATINGS
Symbol
Parameter
Value
Unit
VCC
VI
VO
IIK
IOK
IO
ICC
IGND
TSTG
TL
TJ
qJA
PD
MSL
DC Supply Voltage
DC Input Voltage
DC Output Voltage
DC Input Diode Current
DC Output Diode Current
DC Output Sink Current
DC Supply Current per Supply Pin
DC Ground Current per Ground Pin
Storage Temperature Range
Lead Temperature, 1 mm from Case for 10 Seconds
Junction Temperature under Bias
Thermal Resistance
Power Dissipation in Still Air at 85_C
Moisture Sensitivity
(Note 1)
TSSOP
TSSOP
*0.5 to )7.0
*0.5 to VCC )0.5
*0.5 to VCC )0.5
$20
$35
$35
$75
$75
*65 to )150
260
)150
128
450
Level 1
V
V
V
mA
mA
mA
mA
mA
_C
_C
_C
_C/W
mW
FR
VESD
Flammability Rating
ESD Withstand Voltage
Oxygen Index: 30% 35%
Human Body Model (Note 2)
Machine Model (Note 3)
UL 94 V0 @ 0.125 in
>2000
>200
V
ILatchup Latchup Performance
Above VCC and Below GND at 85_C (Note 4)
$300
mA
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. IO absolute maximum rating must be observed.
2. Tested to EIA/JESD22A114A.
3. Tested to EIA/JESD22A115A.
4. Tested to EIA/JESD78.
5. For high frequency or heavy load considerations, see the ON Semiconductor HighSpeed CMOS Data Book (DL129/D).
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Min
VCC DC Supply Voltage
(Referenced to GND)
2.0
VI, VO DC Input Voltage, Output Voltage
(Referenced to GND)
0
TA Operating Temperature, All Package Types
*55
tr, tf Input Rise and Fall Time (Figure 3)
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
0
0
0
6. Unused inputs may not be left open. All inputs must be tied to a highor lowlogic input voltage level.
Max
6.0
VCC
)125
1000
500
400
Unit
V
V
_C
ns
ORDERING INFORMATION
Device
Package
Shipping
74HC574DTR2G
TSSOP20*
2500 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
*This package is inherently PbFree.
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