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PDF MAX3269 Data sheet ( Hoja de datos )

Número de pieza MAX3269
Descripción 1.25Gbps/2.5Gbps Limiting Amplifiers
Fabricantes Maxim Integrated 
Logotipo Maxim Integrated Logotipo



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No Preview Available ! MAX3269 Hoja de datos, Descripción, Manual

19-1523; Rev 7, 2/06
+3.0V to +5.5V, 1.25Gbps/2.5Gbps
Limiting Amplifiers
General Description
The 1.25Gbps MAX3264/MAX3268/MAX3768 and the
2.5Gbps MAX3265/MAX3269/MAX3765 limiting ampli-
fiers are designed for Gigabit Ethernet and Fibre
Channel optical receiver systems. The amplifiers accept
a wide range of input voltages and provide constant-
level output voltages with controlled edge speeds.
Additional features include RMS power detectors with
programmable loss-of-signal (LOS) indication, an
optional squelch function that mutes the data output sig-
nal when the input voltage falls below a programmable
threshold, and excellent jitter performance.
The MAX3264/MAX3265/MAX3765 feature current-mode
logic (CML) data outputs that are tolerant of inductive
connectors and a 16-pin TSSOP package, making these
circuits ideal for GBIC receivers. The MAX3268/
MAX3269/MAX3768 feature standards-compliant posi-
tive-referenced emitter-coupled logic (PECL) data out-
puts and are available in a tiny 10-pin µMAX package
that is ideal for small-form-factor (SFF) receivers.
Applications
Gigabit Ethernet Optical Receivers
Fibre Channel Optical Receivers
System Interconnect
ATM Optical Receivers
Selector Guide appears at end of data sheet.
Pin Configurations appear at end of data sheet.
CAZ
Features
+3.0V to +5.5V Supply Voltage
Low Deterministic Jitter
14ps (MAX3264)
11ps (MAX3265/MAX3765)
150ps (max) Edge Speed (MAX3265/MAX3765)
300ps (max) Edge Speed (MAX3264)
Programmable Signal-Detect Function
Choice of CML or PECL Output Interface
10-Pin µMAX or 16-Pin TSSOP Package
Ordering Information
PART
TEMP RANGE
PIN-PACKAGE
MAX3264CUE
0°C to +70°C
16 TSSOP-EP*
MAX3264CUE+
0°C to +70°C
16 TSSOP-EP*
MAX3264C/D
0°C to +70°C
Dice**
MAX3265CUE
0°C to +70°C
16 TSSOP-EP*
MAX3265CUE+
0°C to +70°C
16 TSSOP-EP*
MAX3265CUB
0°C to +70°C
10 µMAX-EP*
MAX3265CUB+
0°C to +70°C
10 µMAX-EP*
MAX3265EUE
-40°C to +85°C
16 TSSOP-EP*
MAX3265EUE+
-40°C to +85°C
16 TSSOP-EP*
MAX3265C/D
0°C to +70°C
Dice**
+Denotes lead-free package.
*EP = Exposed paddle.
**Dice are designed to operate from 0°C to +70°C, but are tested
and guaranteed only at TA = +25°C.
Ordering Information continued at end of data sheet.
Typical Operating Circuits
VCC
VCC
CAZ1 CAZ2
MAX3266
MAX3267
CIN
0.01µF
IN+
100
IN-
CIN
0.01µF
TH SQUELCH
RTH
Typical Operating Circuits continued at end of data sheet.
N.C.
VCC
MAX3264CUE
MAX3265CUE
MAX3265EUE
RTERM
0.01µF
OUT+
0.01µF
OUT-
RL
100
LOS LOS LEVEL
LOSS N.C.
OF
SIGNAL
N.C.
RTERM
VCC
________________________________________________________________ Maxim Integrated Products 1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
http://www.Datasheet4U.com

1 page




MAX3269 pdf
+3.0V to +5.5V, 1.25Gbps/2.5Gbps
Limiting Amplifiers
(TA = +25°C, unless otherwise noted.)
OUTPUT VOLTAGE
vs. INPUT VOLTAGE
1700
1500
MAX3264/MAX3268
1300
1100
900 MAX3265/MAX3269/MAX3765
700
500
300
0
2 4 6 8 10
INPUT VOLTAGE (mV)
12
MAX3264/MAX3268/MAX3768
DETERMINISTIC JITTER
vs. INPUT AMPLITUDE
30
25
20
15
10
5
0
0 200 400 600 800 1000 1200
INPUT AMPLITUDE (mV)
MAX3265/MAX3269/MAX3765
RANDOM JITTER
vs. INPUT AMPLITUDE
8
7
6
5
4
3
2
1
0
0 10 20 30 40 50
INPUT AMPLITUDE (mV)
Typical Operating Characteristics
MAX3264
LOS HYSTERESIS vs. TEMPERATURE
6.5
6.0
5.5
5.0
4.5
RTH = 25k
4.0
RTH = 7k
3.5
0
10 20 30 40 50 60 70
TEMPERATURE (°C)
MAX3264/MAX3268/MAX3768
RANDOM JITTER
vs. INPUT AMPLITUDE
16
14
12
10
8
6
4
2
0
0 10 20 30 40 50
INPUT AMPLITUDE (mV)
LOSS OF SIGNAL WITH SQUELCH
VIN
MAX3265EUE
LOS HYSTERESIS vs. TEMPERATURE
6.5
6.0
5.5
5.0 RTH = 4.6k
4.5
4.0 RTH = 16k
3.5
-40
30
-15 10 35 60
TEMPERATURE (°C)
85
MAX3265/MAX3269/MAX3765
DETERMINISTIC JITTER
vs. INPUT AMPLITUDE
25
20
15
10
5
0
0 200 400 600 800 1000 1200
INPUT AMPLITUDE (mV)
MAX3268/MAX3768
DATA OUTPUT EYE DIAGRAM
(MINIMUM INPUT)
VOUT
300mV/div
VLOS
500ns/div
200ps/div
_______________________________________________________________________________________ 5
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MAX3269 arduino
+3.0V to +5.5V, 1.25Gbps/2.5Gbps
Limiting Amplifiers
Input Buffer
The input buffer is designed to accept input signals
from the MAX3266/MAX3267 transimpedance ampli-
fiers. The input buffer provides a 100input imped-
ance between IN+ and IN-. Input VSWR is typically less
than 2.0 for frequencies less than 2GHz. DC-coupling
the inputs is not recommended; this prevents the DC
offset-correction circuitry from functioning properly.
Gain Stage and Offset Correction
The limiting amplifier provides approximately 55dB
(MAX3264/MAX3268/MAX3768) or 49dB (MAX3265/
MAX3269/MAX3765) of gain. This large gain makes the
amplifier susceptible to small DC offsets in the input sig-
nal. DC offsets as low as 1mV reduce the accuracy of
the power-detection circuit and may cause deterministic
jitter. A low-frequency feedback loop is integrated into
the limiting amplifier to reduce input offset, typically to
less than 100µV.
An external capacitor connected between CAZ1 and
CAZ2, in parallel with internal capacitance, determines
the time constant of the offset-correction circuit. The off-
set-correction circuit requires an average data-input
mark density of 50% to prevent an increase in duty-
cycle distortion and to ensure low deterministic jitter.
VCC
CML Output Buffer
The MAX3264/MAX3265/MAX3765 CML output circuits
(Figure 7) provide high tolerance to impedance mis-
matches and inductive connectors. The output current
can be set to two levels. When the LEVEL pin is left
unconnected, output current is approximately 16mA.
Connecting LEVEL to ground sets the output current to
approximately 20mA.
The squelch function is enabled when the SQUELCH pin
is set to a TTL-high level or connected to VCC. The
squelch function holds OUT+ and OUT- at a static volt-
age whenever the input signal power drops below the
loss-of-signal threshold. In the 10-pin µMAX package of
the MAX3265/MAX3268/MAX3269, the SQUELCH func-
tion is left internally unconnected. In the MAX3765/
MAX3768, the SQUELCH function is always enabled by
internally connecting it to VCC. SQUELCH operation for
the MAX3264/MAX3265 is described in Table 1.
Table 1.
LEVEL PIN
Open
GND
VOLTAGE WHEN SQUELCHED
OUT-
OUT+
VCC - 100mV
VCC
VCC - 100mV
VCC - 100mV
Internal Input/Output Schematics
0.25pF
IN+
IN-
0.25pF
500
500
110
VCC
RT
LOS
ESD
STRUCTURES
ESD
STRUCTURE
GND
RT = 8k(MAX3265/MAX3269/MAX3765)
RT = 16k(MAX3264/MAX3268/MAX3768)
Figure 4. Input Circuit
GND
Figure 5. LOS Output Circuit
______________________________________________________________________________________ 11
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