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PDF ADP2139 Data sheet ( Hoja de datos )
| Número de pieza | ADP2139 | |
| Descripción | Compact 800mA 3 MHz Step-Down DC-to-DC Converter | |
| Fabricantes | Analog Devices | |
| Logotipo |  |
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Data Sheet
Compact, 800 mA, 3 MHz,
Step-Down DC-to-DC Converter
ADP2138/ADP2139
FEATURES
GENERAL DESCRIPTION
Input voltage: 2.3 V to 5.5 V
Peak efficiency: 95%
3 MHz fixed frequency operation
Typical quiescent current: 24 μA
Very small solution size
6-lead, 1 mm × 1.5 mm WLCSP package
Fast load and line transient response
100% duty cycle low dropout mode
Internal synchronous rectifier, compensation, and soft start
Current overload and thermal shutdown protections
Ultralow shutdown current: 0.2 μA (typical)
Forced PWM and automatic PWM/PSM modes
Supported by ADIsimPower™ design tool
The ADP2138 and ADP2139 are high efficiency, low quiescent
current, synchronous step-down dc-to-dc converters. The
ADP2139 has the additional feature of an internal discharge
switch. The total solution requires only three tiny external
components. When the MODE pin is set high, the buck
regulator operates in forced PWM mode, which provides low
peak-to-peak ripple for power supply noise sensitive loads at
the expense of light load efficiency. When the MODE pin is set
low, the buck regulator automatically switches operating modes,
depending on the load current level. At higher output loads, the
buck regulator operates in PWM mode. When the load current
falls below a predefined threshold, the regulator operates in power
save mode (PSM), improving light load efficiency.
APPLICATIONS
PDAs and palmtop computers
Wireless handsets
Digital audio, portable media players
Digital cameras, GPS navigation units
The ADP2138/ADP2139 operate on input voltages of 2.3 V to
5.5 V, which allows for single lithium or lithium polymer cell,
multiple alkaline or NiMH cell, PCMCIA, USB, and other
standard power sources. The maximum load current of 800 mA
is achievable across the input voltage range.
The ADP2138/ADP2139 are available in fixed output voltages of
3.3 V, 3.0 V, 2.8 V, 2.5 V, 1.8 V, 1.5 V, 1.2 V, 1.0 V, and 0.8 V. All
versions include an internal power switch and synchronous rect-
ifier for minimal external part count and high efficiency. The
ADP2138/ADP2139 have internal soft start and they are internally
compensated. During logic controlled shutdown, the input is
disconnected from the output and the ADP2138/ADP2139
draw 0.2 μA (typical) from the input source.
Other key features include undervoltage lockout to prevent deep
battery discharge, and soft start to prevent input current over-
shoot at startup. The ADP2138/ADP2139 are available in a 6-ball
wafer level chip scale package (WLCSP).
TYPICAL APPLICATIONS CIRCUIT
2.3V TO 5.5V
4.7µF
VIN SW
ADP2138/
ADP2139
ON
OFF
EN
VOUT
FORCE
PWM
AUTO
MODE
GND
1.0µH
Figure 1.
VOUT
4.7µF
Rev. C
Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityisassumedbyAnalogDevices for itsuse,nor foranyinfringementsofpatentsor other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 ©2011–2013 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com
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1 page  
Data Sheet
ADP2138/ADP2139
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
VIN EN
14
SW MODE
25
GND VOUT
36
TOP VIEW
(BALL SIDE DOWN)
Not to Scale
Figure 2. Pin Configuration (Top View)
Table 5. Pin Function Descriptions
Pin No. Mnemonic Description
1 VIN
Power Source Input. VIN is the source of the PFET high-side switch. Bypass VIN to GND with a 4.7 μF or greater
capacitor as close to the ADP2138/ADP2139 as possible.
2 SW
Switch Node Output. SW is the drain of the P-channel MOSFET switch and N-channel synchronous rectifier.
Connect the output LC filter between SW and the output voltage.
3 GND Ground. Connect the input and output capacitors to GND.
4 EN
Buck Activation. To turn on the buck, set EN to high. To turn off the buck, set EN to low.
5
MODE
Mode Input. Drive the MODE pin high for the operating mode to force continuous PWM switching. Drive the MODE
pin low to allow automatic PWM/PSM operating mode.
6
VOUT
Output Voltage Sensing Input.
Rev. C | Page 5 of 20
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5 Page 
Data Sheet
THEORY OF OPERATION
GM ERROR
AMP
PWM
COMP
ADP2138/ADP2139
VOUT
SOFT START
ILIMIT
PSM
COMP
PWM/
PSM
CONTROL
LOW
CURRENT
VIN
SW
MODE
OSCILLATOR
UNDERVOLTAGE
LOCK OUT
ADP2138
DRIVER
AND
ANTISHOOT
THROUGH
THERMAL
SHUTDOWN
GND
EN
Figure 33. ADP2138 Functional Block Diagram
The ADP2138 and ADP2139 are step-down dc-to-dc converters
that use a fixed frequency and high speed current-mode archi-
tecture. The high switching frequency and tiny 6-ball WLCSP
package allow for a small step-down dc-to-dc converter solution.
The ADP2138/ADP2139 operate with an input voltage of 2.3 V
to 5.5 V, and regulate an output voltage down to 0.8 V.
CONTROL SCHEME
The ADP2138/ADP2139 operate with a fixed frequency, current-
mode PWM control architecture at medium to high loads for
high efficiency, but shift to a power save mode control scheme
at light loads to lower the regulation power losses. When operating
in PWM mode, the duty cycle of the integrated switches is adjusted
and regulates the output voltage. When operating in power save
mode at light loads, the output voltage is controlled in a hyste-
retic manner, with higher VOUT ripple. During part of this time,
the converter is able to stop switching and enters an idle mode,
which improves conversion efficiency. Each ADP2138/ADP2139
has a MODE pin, which determines the operation of the buck
regulator in either PWM mode (when the MODE pin is set
high) or power save mode (when the mode pin is set low).
PWM MODE
In PWM mode, the ADP2138/ADP2139 operate at a fixed
frequency of 3 MHz, set by an internal oscillator. At the start
of each oscillator cycle, the PFET switch is turned on, sending
a positive voltage across the inductor. Current in the inductor
increases until the current sense signal crosses the peak inductor
current threshold that turns off the PFET switch and turns on
the NFET synchronous rectifier. This sends a negative voltage
across the inductor, causing the inductor current to decrease.
The synchronous rectifier stays on for the rest of the cycle.
The ADP2138/ADP2139 regulate the output voltage by adjusting
the peak inductor current threshold.
POWER SAVE MODE
The ADP2138/ADP2139 smoothly transition to the power save
mode of operation when the load current decreases below the
power save mode current threshold. When the ADP2138 and
ADP2139 enter power save mode, an offset is induced in the PWM
regulation level, which makes the output voltage rise. When the
output voltage reaches a level approximately 1.5% above the PWM
regulation level, PWM operation turns off. At this point, both
power switches are off, and the ADP2138/ ADP2139 enter into
idle mode. COUT discharges until VOUT falls to the PWM regulation
voltage, at which point the device drives the inductor to cause
VOUT to rise again to the upper threshold. This process is repeated
for as long as the load current is below the power save mode
current threshold.
Power Save Mode Current Threshold
The power save mode current threshold is set to 100 mA. The
ADP2138/ADP2139 employ a scheme that enables this current
to remain accurately controlled, independent of VIN and VOUT
levels. This scheme also ensures that there is very little hysteresis
between the power save mode current threshold for entry to and
exit from the power save mode. The power save mode current
threshold is optimized for excellent efficiency across all load
currents.
ENABLE/SHUTDOWN
The ADP2138/ADP2139 start operating with soft start when
the EN pin is toggled from logic low to logic high. Pulling the
EN pin low forces the device into shutdown mode, reducing the
shutdown current to 0.2 μA (typical).
Rev. C | Page 11 of 20
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