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29LV512 PDF даташит
Спецификация 29LV512 изготовлена «ATMEL Corporation» и имеет функцию, называемую «AT29LV512». |
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Детали детали
Номер произв | 29LV512 |
Описание | AT29LV512 |
Производители | ATMEL Corporation |
логотип | ![]() |
15 Pages

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Features
• Single Supply Voltage, Range 3V to 3.6V
• 3-volt Only Read and Write Operation
• Software Protected Programming
• Low-power Dissipation
– 15 mA Active Current
– 50 µA CMOS Standby Current
• Fast Read Access Time – 120 ns
• Sector Program Operation
– Single-cycle Reprogram (Erase and Program)
– 512 Sectors (128 Bytes/Sector)
– Internal Address and Data Latches for 128 Bytes
• Fast Sector Program Cycle Time – 20 ms Max
• Internal Program Control and Timer
• DATA Polling for End of Program Detection
• Typical Endurance > 10,000 Cycles
• CMOS and TTL Compatible Inputs and Outputs
• Green (Pb/Halide-free) Packaging Option
512K (64K x 8)
3-volt Only
Flash Memory
AT29LV512
1. Description
The AT29LV512 is a 3-volt-only in-system Flash programmable erasable read-only
memory (PEROM). Its 512K of memory is organized as 65,536 words by 8 bits. Man-
ufactured with Atmel’s advanced nonvolatile CMOS technology, the device offers
access times to 120 ns with power dissipation of just 54 mW over the industrial tem-
perature range. When the device is deselected, the CMOS standby current is less
than 50 µA. The device endurance is such that any sector can typically be written to in
excess of 10,000 times.
To allow for simple in-system reprogrammability, the AT29LV512 does not require
high input voltages for programming. Three-volt-only commands determine the opera-
tion of the device. Reading data out of the device is similar to reading from an
EPROM. Reprogramming the AT29LV512 is performed on a sector basis; 128 bytes
of data are loaded into the device and then simultaneously programmed.
During a reprogram cycle, the address locations and 128 bytes of data are captured at
microprocessor speed and internally latched, freeing the address and data bus for
other operations. Following the initiation of a program cycle, the device will automati-
cally erase the sector and then program the latched data using an internal control
timer. The end of a program cycle can be detected by DATA polling of I/O7. Once the
end of a program cycle has been detected, a new access for a read or program can
begin.
0177O–FLASH–9/08
Free Datasheet http://www.Datasheet4U.com

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2. Pin Configurations
Pin Name
A0 - A15
CE
OE
WE
I/O0 - I/O7
NC
2.1 32-lead PLCC Top View
Function
Addresses
Chip Enable
Output Enable
Write Enable
Data Inputs/Outputs
No Connect
A7 5
A6 6
A5 7
A4 8
A3 9
A2 10
A1 11
A0 12
I/O0 13
29 A14
28 A13
27 A8
26 A9
25 A11
24 OE
23 A10
22 CE
21 I/O7
2.2 32-lead TSOP (Type 1) Top View
A11
A9
A8
A13
A14
NC
WE
VCC
NC
NC
A15
A12
A7
A6
A5
A4
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32 OE
31 A10
30 CE
29 I/O7
28 I/O6
27 I/O5
26 I/O4
25 I/O3
24 GND
23 I/O2
22 I/O1
21 I/O0
20 A0
19 A1
18 A2
17 A3
2 AT29LV512
0177O–FLASH–9/08
Free Datasheet http://www.Datasheet4U.com

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3. Block Diagram
AT29LV512
4. Device Operation
4.1 Read
The AT29LV512 is accessed like an EPROM. When CE and OE are low and WE is high, the
data stored at the memory location determined by the address pins is asserted on the outputs.
The outputs are put in the high impedance state whenever CE or OE is high. This dual-
line control gives designers flexibility in preventing bus contention.
4.2 Software Data Protection Programming
The AT29LV512 has 512 individual sectors, each 128 bytes. Using the software data protection
feature, byte loads are used to enter the 128 bytes of a sector to be programmed. The
AT29LV512 can only be programmed or reprogrammed using the software data protection fea-
ture. The device is programmed on a sector basis. If a byte of data within the sector is to be
changed, data for the entire 128-byte sector must be loaded into the device. The AT29LV512
automatically does a sector erase prior to loading the data into the sector. An erase command is
not required.
Software data protection protects the device from inadvertent programming. A series of three
program commands to specific addresses with specific data must be presented to the device
before programming may occur. After writing the three-byte command sequence (and after tWC),
the entire device is protected. The same three program commands must begin each program
operation. All software program commands must obey the sector program timing specifications.
Power transitions will not reset the software data protection feature; however, the software fea-
ture will guard against inadvertent program cycles during power transitions.
Any attempt to write to the device without the 3-byte command sequence will start the internal
write timers. No data will be written to the device; however, for the duration of tWC, a read opera-
tion will effectively be a polling operation.
After the software data protection’s 3-byte command code is given, a byte load is performed by
applying a low pulse on the WE or CE input with CE or WE low (respectively) and OE high. The
address is latched on the falling edge of CE or WE, whichever occurs last. The data is latched by
the first rising edge of CE or WE.
0177O–FLASH–9/08
3
Free Datasheet http://www.Datasheet4U.com

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