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PDF 65N02R Data sheet ( Hoja de datos )
| Número de pieza | 65N02R | |
| Descripción | NTB65N02R | |
| Fabricantes | ON Semiconductor | |
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NTB65N02R, NTP65N02R
Power MOSFET
65 A, 24 V N−Channel
TO−220, D2PAK
Features
• Planar HD3e Process for Fast Switching Performance
• Low RDSon to Minimize Conduction Loss
• Low Ciss to Minimize Driver Loss
• Low Gate Charge
• Pb−Free Packages are Available*
http://onsemi.com
V(BR)DSS
24 V
RDS(on) TYP
8.4 mW @ 10 V
ID MAX
65 A
D
MAXIMUM RATINGS (TJ = 25°C Unless otherwise specified)
Parameter
Symbol Value Unit
Drain−to−Source Voltage
Gate−to−Source Voltage − Continuous
Thermal Resistance − Junction−to−Case
Total Power Dissipation @ TC = 25°C
Drain Current −
Continuous @ TC = 25°C, Chip
Continuous @ TC =25°C, Limited by Package
Single Pulse (tp = 10 ms)
VDSS
VGS
RqJC
PD
ID
ID
IDM
25
±20
2.0
62.5
Vdc
Vdc
°C/W
W
65 A
58 A
160 A
Thermal Resistance −
Junction−to−Ambient (Note 1)
Total Power Dissipation @ TA = 25°C
Drain Current − Continuous @ TA = 25°C
Thermal Resistance −
Junction−to−Ambient (Note 2)
Total Power Dissipation @ TA = 25°C
Drain Current − Continuous @ TA = 25°C
Operating and Storage Temperature Range
RqJA
PD
ID
67 °C/W
1.86 W
10 A
RqJA
PD
ID
TJ and
Tstg
120 °C/W
1.04 W
7.6 A
−55 to °C
150
Single Pulse Drain−to−Source Avalanche
Energy − Starting TJ = 25°C
(VDD = 50 Vdc, VGS = 10 Vdc, IL = 11 Apk,
L = 1 mH, RG = 25 W)
Maximum Lead Temperature for Soldering
Purposes, 1/8″ from Case for 10 Seconds
EAS 60 mJ
TL 260 °C
Maximum ratings are those values beyond which device damage can occur.
Maximum ratings applied to the device are individual stress limit values (not
normal operating conditions) and are not valid simultaneously. If these limits are
exceeded, device functional operation is not implied, damage may occur and
reliability may be affected.
1. When surface mounted to an FR4 board using 1 in. pad size, (Cu Area 1.127 in2).
2. When surface mounted to an FR4 board using minimum recommended pad
size, (Cu Area 0.412 in2).
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
© Semiconductor Components Industries, LLC, 2005
May, 2005 − Rev. 6
1
G
S
MARKING
DIAGRAMS
4 TO−220AB
CASE 221A
STYLE 5
P65N02RG
AYWW
123
4 D2PAK
CASE 418AA
65N02RG
2
STYLE 2
AYWW
13
65N02R = Specific Device Code
A = Assembly Location
Y = Year
WW = Work Week
G = Pb−Free Package
PIN ASSIGNMENT
PIN FUNCTION
1 Gate
2 Drain
3 Source
4 Drain
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 5 of this data sheet.
Publication Order Number:
NTB65N02R/D
Free Datasheet http://www.datasheetlist.com/
1 page  
1
D = 0.5
NTB65N02R, NTP65N02R
0.2
0.1
0.05
SINGLE PULSE
0.1
0.0001
0.01
0.001
0.01
t, TIME (s)
0.1
Figure 12. Thermal Response
1
10
ORDERING INFORMATION
Device
NTB65N02R
NTB65N02RG
Package
D2PAK
D2PAK
(Pb−Free)
Shipping†
50 Units / Rail
50 Units / Rail
NTB65N02RT4
NTB65N02RT4G
D2PAK
D2PAK
(Pb−Free)
800 / Tape & Reel
800 / Tape & Reel
NTP65N02R
TO−220AB
50 Units / Rail
NTP65N02RG
TO−220AB
(Pb−Free)
50 Units / Rail
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
http://onsemi.com
5
Free Datasheet http://www.datasheetlist.com/
5 Page | ||
| Páginas | Total 8 Páginas | |
| PDF Descargar | [ Datasheet 65N02R.PDF ] | |
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