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AD7904 PDF даташит

Спецификация AD7904 изготовлена ​​​​«Analog Devices» и имеет функцию, называемую «(AD79x4) 8-/10-/12-Bit ADCs».

Детали детали

Номер произв AD7904
Описание (AD79x4) 8-/10-/12-Bit ADCs
Производители Analog Devices
логотип Analog Devices логотип 

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AD7904 Даташит, Описание, Даташиты
a
4-Channel, 1 MSPS, 8-/10-/12-Bit ADCs
with Sequencer in 16-Lead TSSOP
AD7904/AD7914/AD7924
FEATURES
Fast Throughput Rate: 1 MSPS
Specified for VDD of 2.7 V to 5.25 V
Low Power:
6 mW max at 1 MSPS with 3 V Supplies
13.5 mW max at 1 MSPS with 5 V Supplies
4 (Single-Ended) Inputs with Sequencer
Wide Input Bandwidth:
AD7924, 70 dB SNR at 50 kHz Input Frequency
Flexible Power/Serial Clock Speed Management
No Pipeline Delays
High Speed Serial Interface SPITM/QSPITM/
MICROWIRETM/DSP Compatible
Shutdown Mode: 0.5 A Max
16-Lead TSSOP Package
GENERAL DESCRIPTION
The AD7904/AD7914/AD7924 are respectively, 8-bit, 10-bit,
and 12-bit, high speed, low power, 4-channel, successive-approxi-
mation ADCs. The parts operate from a single 2.7 V to 5.25 V
power supply and feature throughput rates up to 1 MSPS. The
parts contain a low noise, wide bandwidth track/hold amplifier that
can handle input frequencies in excess of 8 MHz.
The conversion process and data acquisition are controlled
using CS and the serial clock signal, allowing the device to
easily interface with microprocessors or DSPs. The input signal
is sampled on the falling edge of CS and conversion is also
initiated at this point. There are no pipeline delays associated
with the part.
The AD7904/AD7914/AD7924 use advanced design techniques to
achieve very low power dissipation at maximum throughput rates.
At maximum throughput rates, the AD7904/AD7914/AD7924
consume 2 mA maximum with 3 V supplies; with 5 V supplies, the
current consumption is 2.7 mA maximum.
Through the configuration of the Control Register, the analog
input range for the part can be selected as 0 V to REFIN or 0 V
to 2 × REFIN, with either straight binary or twos complement
output coding. The AD7904/AD7914/AD7924 each feature four
single-ended analog inputs with a channel sequencer to allow a
preprogrammed selection of channels to be converted sequentially.
The conversion time for the AD7904/AD7914/AD7924 is deter-
mined by the SCLK frequency, as this is also used as the master
clock to control the conversion.
SPI and QSPI are trademarks of Motorola, Inc.
MICROWIRE is a trademark of National Semiconductor Corporation.
FUNCTIONAL BLOCK DIAGRAM
VDD
REFIN
VIN0
VIN3
T/H
I/P
MUX
8-/10-/12-BIT
SUCCESSIVE
APPROXIMATION
ADC
SEQUENCER
CONTROL LOGIC
AD7904/AD7914/AD7924
GND
SCLK
DOUT
DIN
CS
VDRIVE
PRODUCT HIGHLIGHTS
1. High Throughput with Low Power Consumption.
The AD7904/AD7914/AD7924 offer up to 1 MSPS through-
put rates. At the maximum throughput rate with 3 V sup`plies,
the AD7904/AD7914/AD7924 dissipate just 6 mW of
power maximum.
2. Four Single-Ended Inputs with a Channel Sequencer.
A consecutive sequence of channels can be selected, through
which the ADC will cycle and convert on.
3. Single-Supply Operation with VDRIVE Function.
The AD7904/AD7914/AD7924 operate from a single 2.7 V
to 5.25 V supply. The VDRIVE function allows the serial inter-
face to connect directly to either 3 V or 5 V processor systems
independent of VDD.
4. Flexible Power/Serial Clock Speed Management.
The conversion rate is determined by the serial clock, allowing
the conversion time to be reduced through the serial clock speed
increase. The parts also feature various shutdown modes to
maximize power efficiency at lower throughput rates. Current
consumption is 0.5 µA max when in full shutdown.
5. No Pipeline Delay.
The parts feature a standard successive-approximation ADC
with accurate control of the sampling instant via a CS input
and once off conversion control.
REV. 0
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
www.analog.com
Fax: 781/326-8703
© Analog Devices, Inc., 2002
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AD7904 Даташит, Описание, Даташиты
AD7904SPECIFICATIONS (AVDD = VDRIVE = 2.7 V to 5.25 V, REFIN = 2.5 V, fSCLK = 20 MHz, TA = TMIN to TMAX,
unless otherwise noted.)
Parameter
DYNAMIC PERFORMANCE
Signal-to-Noise + Distortion (SINAD)2
Signal-to-Noise Ratio (SNR)2
Total Harmonic Distortion (THD)2
Peak Harmonic or Spurious Noise
(SFDR)2
Intermodulation Distortion (IMD)2
Second Order Terms
Third Order Terms
Aperture Delay
Aperture Jitter
Channel-to-Channel Isolation2
Full Power Bandwidth
DC ACCURACY2
Resolution
Integral Nonlinearity
Differential Nonlinearity
0 V to REFIN Input Range
Offset Error
Offset Error Match
Gain Error
Gain Error Match
0 V to 2 × REFIN Input Range
Positive Gain Error
Positive Gain Error Match
Zero Code Error
Zero Code Error Match
Negative Gain Error
Negative Gain Error Match
ANALOG INPUT
Input Voltage Range
DC Leakage Current
Input Capacitance
REFERENCE INPUT
REFIN Input Voltage
DC Leakage Current
REFIN Input Impedance
LOGIC INPUTS
Input High Voltage, VINH
Input Low Voltage, VINL
Input Current, IIN
Input Capacitance, CIN3
LOGIC OUTPUTS
Output High Voltage, VOH
Output Low Voltage, VOL
Floating-State Leakage Current
Floating-State Output Capacitance3
Output Coding
CONVERSION RATE
Conversion Time
Track/Hold Acquisition Time
Throughput Rate
B Version1
49
49
–66
–64
–90
–90
10
50
–85
8.2
1.6
Unit
dB min
dB min
dB max
dB max
dB typ
dB typ
ns typ
ps typ
dB typ
MHz typ
MHz typ
Test Conditions/Comments
fIN = 50 kHz Sine Wave, fSCLK = 20 MHz
fa = 40.1 kHz, fb = 41.5 kHz
fIN = 400 kHz
@ 3 dB
@ 0.1 dB
8
± 0.2
± 0.2
± 0.5
± 0.05
± 0.2
± 0.05
± 0.2
± 0.05
± 0.5
± 0.1
± 0.2
± 0.05
Bits
LSB max
LSB max
LSB max
LSB max
LSB max
LSB max
LSB max
LSB max
LSB max
LSB max
LSB max
LSB max
Guaranteed No Missed Codes to 8 Bits
Straight Binary Output Coding
–REFIN to +REFIN Biased about REFIN with
Twos Complement Output Coding
0 to REFIN
0 to 2 × REFIN
±1
20
V
V
µA max
pF typ
RANGE Bit Set to 1
RANGE Bit Set to 0, VDD/VDRIVE = 4.75 V to 5.25 V
2.5
±1
36
0.7 × VDRIVE
0.3 × VDRIVE
±1
10
V
µA max
ktyp
V min
V max
µA max
pF max
± 1% Specified Performance
fSAMPLE = 1 MSPS
Typically 10 nA, VIN = 0 V or VDRIVE
VDRIVE – 0.2
0.4
V min
V max
± 1 µA max
10 pF max
Straight (Natural) Binary
Twos Complement
ISOURCE = 200 µA, VDD = 2.7 V to 5.25 V
ISINK = 200 µA
Coding Bit Set to 1
Coding Bit Set to 0
800
ns max
16 SCLK Cycles with SCLK at 20 MHz
300
ns max
Sine Wave Input
300
ns max
Full-Scale Step Input
1 MSPS max See Serial Interface Section
–2–
REV. 0
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AD7904 Даташит, Описание, Даташиты
Parameter
B Version1
POWER REQUIREMENTS
VDD
VDRIVE
IDD4
Normal Mode (Static)
Normal Mode (Operational)
Using Auto Shutdown Mode
Full Shutdown Mode
Power Dissipation4
Normal Mode (Operational)
Auto Shutdown Mode (Static)
Full Shutdown Mode
2.7/5.25
2.7/5.25
600
2.7
2
960
0.5
0.5
13.5
6
2.5
1.5
2.5
1.5
NOTES
1Temperature ranges as follows: B Version: –40°C to +85°C.
2See Terminology section.
3Sample tested @ 25°C to ensure compliance.
4See Power Versus Throughput Rate section.
Specifications subject to change without notice.
AD7904/AD7914/AD7924
Unit
Test Conditions/Comments
V min/max
V min/max
µA typ
mA max
mA max
µA typ
µA max
µA max
Digital I/Ps = 0 V or VDRIVE
VDD = 2.7 V to 5.25 V, SCLK On or Off
VDD = 4.75 V to 5.25 V, fSCLK = 20 MHz
VDD = 2.7 V to 3.6 V, fSCLK = 20 MHz
fSAMPLE = 250 kSPS
(Static)
SCLK On or Off (20 nA typ)
mW max
mW max
µW max
µW max
µW max
µW max
VDD = 5 V, fSCLK = 20 MHz
VDD = 3 V, fSCLK = 20 MHz
VDD = 5 V
VDD = 3 V
VDD = 5 V
VDD = 3 V
REV. 0
–3–
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